803 lines
17 KiB
Plaintext
803 lines
17 KiB
Plaintext
#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_CHIP_S32K1XX
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# Chip Selection
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choice
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prompt "S32K1XX Chip Selection"
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default ARCH_CHIP_S32K146
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config ARCH_CHIP_S32K116
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bool "S32K116"
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select ARCH_CHIP_S32K11X
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---help---
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Cortex-M0+, 128Kb FLASH, 17Kb RAM incl. 2Kb FlexRAM
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config ARCH_CHIP_S32K118
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bool "S32K118"
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select ARCH_CHIP_S32K11X
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select S32K1XX_HAVE_LPSPI1
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---help---
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Cortex-M0+, 256Kb FLASH, 25Kb RAM incl. 2Kb FlexRAM
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config ARCH_CHIP_S32K142
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bool "S32K142"
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select ARCH_CHIP_S32K14X
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select S32K1XX_HAVE_FLEXCAN1
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---help---
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Cortex-M4F, 256Kb FLASH, 32Kb RAM incl. 4Kb FlexRAM
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config ARCH_CHIP_S32K144
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bool "S32K144"
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select ARCH_CHIP_S32K14X
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select S32K1XX_HAVE_LPSPI2
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select S32K1XX_HAVE_FLEXCAN1
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select S32K1XX_HAVE_FLEXCAN2
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---help---
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Cortex-M4F, 512Kb FLASH, 64Kb RAM incl. 4Kb FlexRAM
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config ARCH_CHIP_S32K146
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bool "S32K146"
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select ARCH_CHIP_S32K14X
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select S32K1XX_HAVE_FTM4
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select S32K1XX_HAVE_FTM5
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select S32K1XX_HAVE_LPSPI2
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select S32K1XX_HAVE_FLEXCAN1
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select S32K1XX_HAVE_FLEXCAN2
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---help---
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Cortex-M4F, 1Mb FLASH, 128Kb RAM incl. 4Kb FlexRAM
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config ARCH_CHIP_S32K148
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bool "S32K148"
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select ARCH_CHIP_S32K14X
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select S32K1XX_HAVE_ENET
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select S32K1XX_HAVE_FTM4
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select S32K1XX_HAVE_FTM5
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select S32K1XX_HAVE_FTM6
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select S32K1XX_HAVE_FTM7
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select S32K1XX_HAVE_LPI2C1
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select S32K1XX_HAVE_LPSPI2
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select S32K1XX_HAVE_SAI
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select S32K1XX_HAVE_FLEXCAN1
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select S32K1XX_HAVE_FLEXCAN2
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---help---
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Cortex-M4F, 2Mb FLASH, 256Kb RAM incl. 4Kb FlexRAM
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endchoice # S32K1XX Chip Selection
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# Chip Family
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config ARCH_CHIP_S32K11X
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bool
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select ARCH_CORTEXM0
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select S32K1XX_HAVE_FIRC_CMU
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config ARCH_CHIP_S32K14X
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bool
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select ARCH_CORTEXM4
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select ARCH_HAVE_FPU
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select ARCH_HAVE_FETCHADD
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select S32K1XX_HAVE_EWM
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select S32K1XX_HAVE_FTM2
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select S32K1XX_HAVE_FTM3
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select S32K1XX_HAVE_SPLL
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select S32K1XX_HAVE_HSRUN
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select S32K1XX_HAVE_LMEM
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select S32K1XX_HAVE_LPSPI1
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# Chip Capabilities
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config S32K1XX_HAVE_ENET
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bool
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default n
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select ARCH_HAVE_PHY
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select ARCH_PHY_INTERRUPT
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select ARCH_HAVE_NETDEV_STATISTICS
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config S32K1XX_HAVE_EWM
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bool
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default n
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config S32K1XX_HAVE_FIRC_CMU
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bool
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default n
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config S32K1XX_HAVE_FTM2
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bool
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default n
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config S32K1XX_HAVE_FTM3
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bool
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default n
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config S32K1XX_HAVE_FTM4
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bool
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default n
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config S32K1XX_HAVE_FTM5
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bool
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default n
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config S32K1XX_HAVE_FTM6
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bool
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default n
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config S32K1XX_HAVE_FTM7
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bool
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default n
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config S32K1XX_HAVE_HSRUN
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bool
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default n
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config S32K1XX_HAVE_LMEM
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bool
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default n
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config S32K1XX_HAVE_LPI2C1
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bool
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default n
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config S32K1XX_HAVE_LPSPI1
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bool
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default n
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config S32K1XX_HAVE_LPSPI2
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bool
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default n
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config S32K1XX_HAVE_FLEXCAN1
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bool
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default n
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config S32K1XX_HAVE_FLEXCAN2
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bool
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default n
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config S32K1XX_HAVE_QSPI
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bool
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default n
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config S32K1XX_HAVE_SAI
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bool
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default n
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config S32K1XX_HAVE_SPLL
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bool
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default n
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# Peripheral Group Selections
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config S32K1XX_FTM
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bool
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default n
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config S32K1XX_LPUART
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bool
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default n
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config S32K1XX_LPI2C
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bool
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default n
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config S32K1XX_LPSPI
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bool
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default n
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config S32K1XX_FLEXCAN
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bool
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select NET_CAN_HAVE_CANFD
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default n
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# Peripheral Selection
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menu "S32K1XX Peripheral Selection"
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config S32K1XX_EDMA
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bool "eDMA"
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default n
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config S32K1XX_ENET
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bool "Ethernet"
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default n
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depends on S32K1XX_HAVE_ENET
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config S32K1XX_FLEXCAN0
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bool "FLEXCAN0"
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select S32K1XX_FLEXCAN
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select NET_CAN_HAVE_TX_DEADLINE
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default n
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config S32K1XX_FLEXCAN1
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bool "FLEXCAN1"
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select S32K1XX_FLEXCAN
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select NET_CAN_HAVE_TX_DEADLINE
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default n
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depends on S32K1XX_HAVE_FLEXCAN1
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config S32K1XX_FLEXCAN2
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bool "FLEXCAN2"
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select S32K1XX_FLEXCAN
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select NET_CAN_HAVE_TX_DEADLINE
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default n
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depends on S32K1XX_HAVE_FLEXCAN2
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config S32K1XX_FTM0
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bool "FTM0"
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default n
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select S32K1XX_FTM
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config S32K1XX_FTM1
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bool "FTM1"
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default n
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select S32K1XX_FTM
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config S32K1XX_FTM2
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bool "FTM2"
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default n
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select S32K1XX_FTM
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depends on S32K1XX_HAVE_FTM2
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config S32K1XX_FTM3
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bool "FTM3"
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default n
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select S32K1XX_FTM
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depends on S32K1XX_HAVE_FTM3
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config S32K1XX_FTM4
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bool "FTM4"
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default n
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select S32K1XX_FTM
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depends on S32K1XX_HAVE_FTM4
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config S32K1XX_FTM5
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bool "FTM5"
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default n
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select S32K1XX_FTM
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depends on S32K1XX_HAVE_FTM5
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config S32K1XX_FTM6
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bool "FTM6"
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default n
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select S32K1XX_FTM
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depends on S32K1XX_HAVE_FTM6
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config S32K1XX_FTM7
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bool "FTM7"
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default n
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select S32K1XX_FTM
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depends on S32K1XX_HAVE_FTM7
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menuconfig S32K1XX_LPI2C0
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bool "LPI2C0"
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default n
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select S32K1XX_LPI2C
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menuconfig S32K1XX_LPI2C1
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bool "LPI2C1"
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default n
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select S32K1XX_LPI2C
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depends on S32K1XX_HAVE_LPI2C1
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config S32K1XX_LPSPI0
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bool "LPSPI0"
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default n
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select S32K1XX_LPSPI
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select SPI
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config S32K1XX_LPSPI1
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bool "LPSPI1"
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default n
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select S32K1XX_LPSPI
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select SPI
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depends on S32K1XX_HAVE_LPSPI1
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config S32K1XX_LPSPI2
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bool "LPSPI2"
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default n
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select S32K1XX_LPSPI
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select SPI
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depends on S32K1XX_HAVE_LPSPI2
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config S32K1XX_LPUART0
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bool "LPUART0"
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default n
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select S32K1XX_LPUART
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select LPUART0_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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config S32K1XX_LPUART1
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bool "LPUART1"
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default n
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select S32K1XX_LPUART
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select LPUART1_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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config S32K1XX_LPUART2
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bool "LPUART2"
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default n
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select S32K1XX_LPUART
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select LPUART2_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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config S32K1XX_RTC
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bool "RTC"
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default n
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config S32K1XX_PROGMEM
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bool PROGMEM
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default n
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select ARCH_HAVE_PROGMEM
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depends on (ARCH_CHIP_S32K11X || (ARCH_CHIP_S32K14X && !ARCH_CHIP_S32K148) )
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---help---
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Use the FlexNVM 32/64 KB of d-flash memory as a
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Memory-Technology-Device (MTD).
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config S32K1XX_EEEPROM
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bool "Emulated EEPROM"
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default n
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---help---
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Enables Emulated EEPROM function which uses the FlexRAM and FlexNVM
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memory to emulate non-volatile memory. The EEEPROM wil be registered
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as a ramdisk block device
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endmenu # S32K1XX Peripheral Selection
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menu "S32K1XX FTM PWM Configuration"
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depends on S32K1XX_FTM
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config S32K1XX_FTM0_PWM
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bool "FTM0 PWM"
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default n
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depends on S32K1XX_FTM0
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config S32K1XX_FTM0_CHANNEL
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int "FTM0 PWM Output Channel"
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default 0
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range 0 7
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depends on S32K1XX_FTM0_PWM
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config S32K1XX_FTM1_PWM
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bool "FTM1 PWM"
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default n
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depends on S32K1XX_FTM1
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config S32K1XX_FTM1_CHANNEL
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int "FTM1 PWM Output Channel"
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default 0
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range 0 7
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depends on S32K1XX_FTM1_PWM
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config S32K1XX_FTM2_PWM
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bool "FTM2 PWM"
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default n
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depends on S32K1XX_FTM2
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config S32K1XX_FTM2_CHANNEL
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int "FTM2 PWM Output Channel"
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default 0
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range 0 7
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depends on S32K1XX_FTM2_PWM
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config S32K1XX_FTM3_PWM
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bool "FTM3 PWM"
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default n
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depends on S32K1XX_FTM3
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config S32K1XX_FTM3_CHANNEL
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int "FTM3 PWM Output Channel"
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default 0
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range 0 7
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depends on S32K1XX_FTM3_PWM
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config S32K1XX_FTM4_PWM
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bool "FTM4 PWM"
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default n
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depends on S32K1XX_FTM4
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config S32K1XX_FTM4_CHANNEL
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int "FTM4 PWM Output Channel"
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default 0
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range 0 7
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depends on S32K1XX_FTM4_PWM
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config S32K1XX_FTM5_PWM
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bool "FTM5 PWM"
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default n
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depends on S32K1XX_FTM5
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config S32K1XX_FTM5_CHANNEL
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int "FTM5 PWM Output Channel"
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default 0
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range 0 7
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depends on S32K1XX_FTM5_PWM
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config S32K1XX_FTM6_PWM
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bool "FTM6 PWM"
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default n
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depends on S32K1XX_FTM6
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config S32K1XX_FTM6_CHANNEL
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int "FTM6 PWM Output Channel"
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default 0
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range 0 7
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depends on S32K1XX_FTM6_PWM
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config S32K1XX_FTM7_PWM
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bool "FTM7 PWM"
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default n
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depends on S32K1XX_FTM7
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config S32K1XX_FTM7_CHANNEL
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int "FTM7 PWM Output Channel"
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default 0
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range 0 7
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depends on S32K1XX_FTM7_PWM
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endmenu # S32K1XX FTM PWM Configuration
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config S32K1XX_WDT_DISABLE
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bool "Disable watchdog on reset"
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default y
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menu "S32K1xx GPIO Interrupt Configuration"
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config S32K1XX_GPIOIRQ
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bool "GPIO pin interrupts"
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---help---
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Enable support for interrupting GPIO pins
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if S32K1XX_GPIOIRQ
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config S32K1XX_PORTAINTS
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bool "GPIOA interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port A pins
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config S32K1XX_PORTBINTS
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bool "GPIOB interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port B pins
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config S32K1XX_PORTCINTS
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bool "GPIOC interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port C pins
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config S32K1XX_PORTDINTS
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bool "GPIOD interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port D pins
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config S32K1XX_PORTEINTS
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bool "GPIOE interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port E pins
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endif
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endmenu # S32K1xx GPIO Interrupt Configuration
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menu "S32K1xx FLASH Configuration"
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comment "CAREFUL: Bad selections may lock up your board"
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config S32K1XX_FLASHCFG_BACKDOOR1
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hex "Backdoor comparison key 1"
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default 0xffffffff
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---help---
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Refer to the S32K1xx reference manual for a description of the
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backdoor key. This option selects the first 32-bit word in
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memory.
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config S32K1XX_FLASHCFG_BACKDOOR2
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hex "Backdoor comparison key 2"
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default 0xffffffff
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---help---
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Refer to the S32K1xx reference manual for a description of the
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backdoor key. This option selects the second 32-bit word in
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memory
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config S32K1XX_FLASHCFG_FPROT
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hex "Program flash protection bytes"
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default 0xffffffff
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---help---
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Refer to the S32K1xx reference manual or to hardware/s32k1xx_flashcfg.h
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for a description of the FPROT bitfields.
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config S32K1XX_FLASHCFG_FSEC
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hex "Flash security byte"
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default 0xfe
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---help---
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Refer to the S32K1xx reference manual or to hardware/s32k1xx_flashcfg.h
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for a description of the FSEC bitfields.
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config S32K1XX_FLASHCFG_FOPT
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hex "Flash nonvolatile option byte"
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default 0x7f
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---help---
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Refer to the S32K1xx reference manual or to hardware/s32k1xx_flashcfg.h
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for a description of the FOPT bitfields.
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config S32K1XX_FLASHCFG_FEPROT
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hex "EEPROM protection byte"
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default 0xff
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---help---
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Refer to the S32K1xx reference manual or to hardware/s32k1xx_flashcfg.h
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for a description of the FEPROT bitfields.
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config S32K1XX_FLASHCFG_FDPROT
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hex "Data flash protection byte"
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default 0xff
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---help---
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Refer to the S32K1xx reference manual or to hardware/s32k1xx_flashcfg.h
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for a description of the FDPROT bitfields.
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endmenu # S32K1xx FLASH Configuration
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menu "eDMA Configuration"
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depends on S32K1XX_EDMA
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config S32K1XX_EDMA_NTCD
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int "Number of transfer descriptors"
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default 0
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---help---
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Number of pre-allocated transfer descriptors. Needed for scatter-
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gather DMA. Make to be set to zero to disable in-memory TCDs in
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which case only the TCD channel registers will be used and scatter-
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will not be supported.
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config S32K1XX_EDMA_ELINK
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bool "Channeling Linking"
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default n
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---help---
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This option enables optional minor or major loop channel linking:
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Minor loop channel linking: As the channel completes the minor
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loop, this flag enables linking to another channel. The link target
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channel initiates a channel service request via an internal
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mechanism that sets the TCDn_CSR[START] bit of the specified
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channel.
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If minor loop channel linking is disabled, this link mechanism is
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suppressed in favor of the major loop channel linking.
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|
Major loop channel linking: As the channel completes the minor
|
|
loop, this option enables the linking to another channel. The link
|
|
target channel initiates a channel service request via an internal
|
|
mechanism that sets the TCDn_CSR[START] bit of the linked channel.
|
|
|
|
config S32K1XX_EDMA_ERCA
|
|
bool "Round Robin Channel Arbitration"
|
|
default n
|
|
---help---
|
|
Normally, a fixed priority arbitration is used for channel
|
|
selection. If this option is selected, round robin arbitration is
|
|
used for channel selection.
|
|
|
|
config S32K1XX_EDMA_HOE
|
|
bool "Halt On Error"
|
|
default y
|
|
---help---
|
|
Any error causes the HALT bit to set. Subsequently, all service
|
|
requests are ignored until the HALT bit is cleared.
|
|
|
|
config S32K1XX_EDMA_CLM
|
|
bool "Continuous Link Mode"
|
|
default n
|
|
---help---
|
|
By default, A minor loop channel link made to itself goes through
|
|
channel arbitration before being activated again. If this option is
|
|
selected, a minor loop channel link made to itself does not go
|
|
through channel arbitration before being activated again. Upon minor
|
|
loop completion, the channel activates again if that channel has a
|
|
minor loop channel link enabled and the link channel is itself. This
|
|
effectively applies the minor loop offsets and restarts the next
|
|
minor loop.
|
|
|
|
config S32K1XX_EDMA_EMLIM
|
|
bool "Minor Loop Mapping"
|
|
default n
|
|
---help---
|
|
Normally TCD word 2 is a 32-bit NBYTES field. When this option is
|
|
enabled, TCD word 2 is redefined to include individual enable fields,
|
|
an offset field, and the NBYTES field. The individual enable fields
|
|
allow the minor loop offset to be applied to the source address, the
|
|
destination address, or both. The NBYTES field is reduced when either
|
|
offset is enabled.
|
|
|
|
config S32K1XX_EDMA_EDBG
|
|
bool "Enable Debug"
|
|
default n
|
|
---help---
|
|
When in debug mode, the DMA stalls the start of a new channel. Executing
|
|
channels are allowed to complete. Channel execution resumes when the
|
|
system exits debug mode or the EDBG bit is cleared
|
|
|
|
endmenu # eDMA Global Configuration
|
|
|
|
menu "LPI2C0 Configuration"
|
|
depends on S32K1XX_LPI2C0
|
|
|
|
config LPI2C0_BUSYIDLE
|
|
int "Bus idle timeout period in clock cycles"
|
|
default 0
|
|
|
|
config LPI2C0_FILTSCL
|
|
int "I2C master digital glitch filters for SCL input in clock cycles"
|
|
default 0
|
|
|
|
config LPI2C0_FILTSDA
|
|
int "I2C master digital glitch filters for SDA input in clock cycles"
|
|
default 0
|
|
|
|
endmenu # LPI2C0 Configuration
|
|
|
|
menu "LPI2C1 Configuration"
|
|
depends on S32K1XX_LPI2C1
|
|
|
|
config LPI2C1_BUSYIDLE
|
|
int "Bus idle timeout period in clock cycles"
|
|
default 0
|
|
|
|
config LPI2C1_FILTSCL
|
|
int "I2C master digital glitch filters for SCL input in clock cycles"
|
|
default 0
|
|
|
|
config LPI2C1_FILTSDA
|
|
int "I2C master digital glitch filters for SDA input in clock cycles"
|
|
default 0
|
|
|
|
endmenu # LPI2C1 Configuration
|
|
|
|
menu "Ethernet Configuration"
|
|
depends on S32K1XX_ENET
|
|
|
|
config MXRT_ENET_NRXBUFFERS
|
|
int "Number Rx buffers"
|
|
default 6
|
|
|
|
config S32K1XX_ENET_NTXBUFFERS
|
|
int "Number Tx buffers"
|
|
default 2
|
|
|
|
config S32K1XX_ENET_ENHANCEDBD
|
|
bool # not optional
|
|
default n
|
|
|
|
config S32K1XX_ENET_NETHIFS
|
|
int # Not optional
|
|
default 1
|
|
|
|
config S32K1XX_ENET_PHYINIT
|
|
bool "Board-specific PHY Initialization"
|
|
default n
|
|
---help---
|
|
Some boards require specialized initialization of the PHY before it
|
|
can be used. This may include such things as configuring GPIOs,
|
|
resetting the PHY, etc. If CONFIG_S32K1XX_ENET_PHYINIT is defined in
|
|
the configuration then the board specific logic must provide
|
|
imxrt_phy_boardinitialize(); The i.MXRT ENET driver will call this
|
|
function one time before it first uses the PHY.
|
|
|
|
endmenu # S32K1XX_ENET
|
|
|
|
menu "FLEXCAN0 Configuration"
|
|
depends on S32K1XX_FLEXCAN0
|
|
|
|
config FLEXCAN0_BITRATE
|
|
int "CAN bitrate"
|
|
depends on !NET_CAN_CANFD
|
|
default 1000000
|
|
|
|
config FLEXCAN0_SAMPLEP
|
|
int "CAN sample point"
|
|
depends on !NET_CAN_CANFD
|
|
default 80
|
|
|
|
config FLEXCAN0_ARBI_BITRATE
|
|
int "CAN FD Arbitration phase bitrate"
|
|
depends on NET_CAN_CANFD
|
|
default 1000000
|
|
|
|
config FLEXCAN0_ARBI_SAMPLEP
|
|
int "CAN FD Arbitration phase sample point"
|
|
depends on NET_CAN_CANFD
|
|
default 80
|
|
|
|
config FLEXCAN0_DATA_BITRATE
|
|
int "CAN FD Arbitration phase bitrate"
|
|
depends on NET_CAN_CANFD
|
|
default 4000000
|
|
|
|
config FLEXCAN0_DATA_SAMPLEP
|
|
int "CAN FD Arbitration phase sample point"
|
|
depends on NET_CAN_CANFD
|
|
default 90
|
|
|
|
endmenu # S32K1XX_FLEXCAN0
|
|
|
|
menu "FLEXCAN1 Configuration"
|
|
depends on S32K1XX_FLEXCAN1
|
|
|
|
config FLEXCAN1_BITRATE
|
|
int "CAN bitrate"
|
|
depends on !NET_CAN_CANFD
|
|
default 1000000
|
|
|
|
config FLEXCAN1_SAMPLEP
|
|
int "CAN sample point"
|
|
depends on !NET_CAN_CANFD
|
|
default 80
|
|
|
|
config FLEXCAN1_ARBI_BITRATE
|
|
int "CAN FD Arbitration phase bitrate"
|
|
depends on NET_CAN_CANFD
|
|
default 1000000
|
|
|
|
config FLEXCAN1_ARBI_SAMPLEP
|
|
int "CAN FD Arbitration phase sample point"
|
|
depends on NET_CAN_CANFD
|
|
default 80
|
|
|
|
config FLEXCAN1_DATA_BITRATE
|
|
int "CAN FD Arbitration phase bitrate"
|
|
depends on NET_CAN_CANFD
|
|
default 4000000
|
|
|
|
config FLEXCAN1_DATA_SAMPLEP
|
|
int "CAN FD Arbitration phase sample point"
|
|
depends on NET_CAN_CANFD
|
|
default 90
|
|
|
|
endmenu # S32K1XX_FLEXCAN1
|
|
|
|
menu "FLEXCAN2 Configuration"
|
|
depends on S32K1XX_FLEXCAN2
|
|
|
|
config FLEXCAN2_BITRATE
|
|
int "CAN bitrate"
|
|
depends on !NET_CAN_CANFD
|
|
default 1000000
|
|
|
|
config FLEXCAN2_SAMPLEP
|
|
int "CAN sample point"
|
|
depends on !NET_CAN_CANFD
|
|
default 80
|
|
|
|
config FLEXCAN2_ARBI_BITRATE
|
|
int "CAN FD Arbitration phase bitrate"
|
|
depends on NET_CAN_CANFD
|
|
default 1000000
|
|
|
|
config FLEXCAN2_ARBI_SAMPLEP
|
|
int "CAN FD Arbitration phase sample point"
|
|
depends on NET_CAN_CANFD
|
|
default 80
|
|
|
|
config FLEXCAN2_DATA_BITRATE
|
|
int "CAN FD Arbitration phase bitrate"
|
|
depends on NET_CAN_CANFD
|
|
default 4000000
|
|
|
|
config FLEXCAN2_DATA_SAMPLEP
|
|
int "CAN FD Arbitration phase sample point"
|
|
depends on NET_CAN_CANFD
|
|
default 90
|
|
|
|
endmenu # S32K1XX_FLEXCAN0
|
|
|
|
menu "PROGMEM Configuration"
|
|
depends on S32K1XX_PROGMEM
|
|
|
|
config PROGMEM_SIZE
|
|
int "Progmem size (KB)"
|
|
default 64 if ARCH_CHIP_S32K14X
|
|
default 32 if ARCH_CHIP_S32K11X
|
|
|
|
endmenu
|
|
|
|
endif # ARCH_CHIP_S32K1XX
|