188a76f1f9
Gregory Nutt has submitted the SGA and we can migrate the licenses to Apache. Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
122 lines
3.9 KiB
C
122 lines
3.9 KiB
C
/****************************************************************************
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* arch/arm/src/imx1/imx_irq.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <arch/irq.h>
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#include "chip.h"
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#include "arm_arch.h"
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#include "arm_internal.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/* g_current_regs[] holds a references to the current interrupt level
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* register storage structure. If is non-NULL only during interrupt
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* processing. Access to g_current_regs[] must be through the macro
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* CURRENT_REGS for portability.
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*/
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volatile uint32_t *g_current_regs[1];
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_irqinitialize
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****************************************************************************/
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void up_irqinitialize(void)
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{
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/* Clear, disable and configure all interrupts. */
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putreg32(0, IMX_AITC_INTENABLEH);
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putreg32(0, IMX_AITC_INTENABLEL);
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/* currents_regs is non-NULL only while processing an interrupt */
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CURRENT_REGS = NULL;
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/* Set masking of normal interrupts by priority. Writing all ones
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* (or -1) to the NIMASK register sets the normal interrupt mask to
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* -1 and does not disable any normal interrupt priority levels.
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*/
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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putreg32(-1, IMX_AITC_NIMASK); /* -1: No priority levels masked */
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/* Initialize FIQs */
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#ifdef CONFIG_ARCH_FIQ
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up_fiqinitialize();
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#endif
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/* And finally, enable interrupts */
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up_irq_restore(SVC_MODE | PSR_F_BIT);
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#endif
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}
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/****************************************************************************
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* Name: up_disable_irq
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*
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* Description:
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* Disable the IRQ specified by 'irq'
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*
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****************************************************************************/
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void up_disable_irq(int irq)
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{
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putreg32(irq, IMX_AITC_INTDISNUM);
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}
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/****************************************************************************
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* Name: up_enable_irq
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*
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* Description:
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* Enable the IRQ specified by 'irq'
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*
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****************************************************************************/
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void up_enable_irq(int irq)
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{
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putreg32(irq, IMX_AITC_INTENNUM);
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}
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