2388373aa5
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run all .h and .c files modified in last PR through nxstyle.
Author: Minamiya_Natsuki <yukihiratype2@gmail.com>
Add FMC SDRAM for STM32H7x3 chip (#22)
* Add FMC SDRAM for STM32H7x3 chip
* Add FMC SDRAM for STM32H7x7
* Nuttx Coding Standard requires one declaration per line
* should be __ARCH_ARM_SRC_STM32H7_STM32_FMC_H
* fix bad alignment
* fix typo
* fix typo
* people can't live in furture
* fix comment line length
* fix more comment line length
* fix aligenment
* fix typo
208 lines
5.4 KiB
Plaintext
208 lines
5.4 KiB
Plaintext
############################################################################
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# arch/arm/src/stm32h7/Make.defs
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#
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# Copyright (C) 2018 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name NuttX nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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# The start-up, "head", file. Only common vectors are support so there
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# isn't one.
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HEAD_ASRC =
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# Common ARM and Cortex-M7 files
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CMN_UASRCS =
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CMN_UCSRCS =
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CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
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CMN_ASRCS += up_testset.S vfork.S
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ifeq ($(CONFIG_ARCH_SETJMP_H),y)
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ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
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CMN_ASRCS += up_setjmp.S
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endif
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endif
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CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c
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CMN_CSRCS += up_doirq.c up_exit.c up_hardfault.c up_initialize.c
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CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_mdelay.c up_memfault.c
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CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
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CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
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CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c up_svcall.c
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CMN_CSRCS += up_systemreset.c up_trigger_irq.c up_udelay.c up_unblocktask.c
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CMN_CSRCS += up_usestack.c up_vfork.c
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# Configuration-dependent common files
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ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
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CMN_CSRCS += up_stackcheck.c
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endif
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_ASRCS += up_lazyexception.S
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else
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CMN_ASRCS += up_exception.S
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endif
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CMN_CSRCS += up_vectors.c
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CMN_CSRCS += up_cache.c
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_ASRCS += up_fpu.S
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CMN_CSRCS += up_copyarmstate.c
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endif
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CMN_CSRCS += up_idle.c
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endif
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ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
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CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
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endif
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ifeq ($(CONFIG_STM32H7_PROGMEM),y)
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CMN_CSRCS += stm32_flash.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
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CMN_CSRCS += up_signal_dispatch.c
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CMN_UASRCS += up_signal_handler.S
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endif
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ifeq ($(CONFIG_STACK_COLORATION),y)
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CMN_CSRCS += up_checkstack.c
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endif
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# Required STM32H7 files
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CHIP_ASRCS =
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CHIP_CSRCS = stm32_allocateheap.c stm32_exti_gpio.c stm32_gpio.c stm32_irq.c
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CHIP_CSRCS += stm32_start.c stm32_rcc.c stm32_lowputc.c stm32_serial.c
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CHIP_CSRCS += stm32_uid.c
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += stm32_timerisr.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CHIP_CSRCS += stm32_userspace.c stm32_mpuinit.c
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endif
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ifeq ($(CONFIG_ARMV7M_DTCM),y)
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CHIP_CSRCS += stm32_dtcm.c
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ifeq ($(CONFIG_STM32H7_DTCM_PROCFS),y)
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CHIP_CSRCS += stm32_procfs_dtcm.c
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endif
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endif
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ifeq ($(CONFIG_STM32H7_ADC),y)
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CHIP_CSRCS += stm32_adc.c
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endif
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ifeq ($(CONFIG_STM32H7_BBSRAM),y)
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ifeq ($(CONFIG_ARMV7M_DCACHE),y)
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ifeq ($(CONFIG_BUILD_PROTECTED),)
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CMN_CSRCS += up_mpu.c
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endif
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endif
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CHIP_CSRCS += stm32_bbsram.c
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endif
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ifeq ($(CONFIG_STM32H7_DMA),y)
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CHIP_CSRCS += stm32_dma.c
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endif
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ifeq ($(CONFIG_STM32H7_FMC),y)
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CHIP_CSRCS += stm32_fmc.c
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endif
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ifeq ($(filter y,$(CONFIG_STM32H7_IWDG) $(CONFIG_STM32H7_RTC_LSICLOCK)),y)
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CHIP_CSRCS += stm32_lsi.c
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endif
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ifeq ($(CONFIG_STM32H7_RTC_LSECLOCK),y)
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CHIP_CSRCS += stm32_lse.c
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endif
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ifeq ($(CONFIG_STM32H7_I2C),y)
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CHIP_CSRCS += stm32_i2c.c
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endif
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ifeq ($(CONFIG_STM32H7_PWR),y)
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CHIP_CSRCS += stm32_pwr.c
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endif
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ifeq ($(CONFIG_STM32H7_RTC),y)
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CHIP_CSRCS += stm32_rtc.c
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ifeq ($(CONFIG_RTC_ALARM),y)
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CHIP_CSRCS += stm32_exti_alarm.c
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endif
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ifeq ($(CONFIG_RTC_PERIODIC),y)
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CHIP_CSRCS += stm32_exti_wakeup.c
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endif
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ifeq ($(CONFIG_RTC_DRIVER),y)
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CHIP_CSRCS += stm32_rtc_lowerhalf.c
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endif
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endif
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ifeq ($(CONFIG_STM32H7_SPI),y)
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CHIP_CSRCS += stm32_spi.c
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endif
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ifeq ($(CONFIG_STM32H7_SDMMC),y)
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CHIP_CSRCS += stm32_sdmmc.c
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endif
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ifeq ($(CONFIG_USBDEV),y)
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CHIP_CSRCS += stm32_otgdev.c
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endif
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ifeq ($(CONFIG_USBHOST),y)
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CHIP_CSRCS += stm32_otghost.c
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endif
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ifeq ($(CONFIG_STM32H7_TIM),y)
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CHIP_CSRCS += stm32_tim.c
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endif
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ifeq ($(CONFIG_STM32H7_PWM),y)
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CHIP_CSRCS += stm32_pwm.c
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endif
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ifeq ($(CONFIG_STM32H7_ETHMAC),y)
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CHIP_CSRCS += stm32_ethernet.c
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endif
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ifeq ($(CONFIG_SENSORS_QENCODER),y)
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CHIP_CSRCS += stm32_qencoder.c
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endif
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