431 lines
13 KiB
C
431 lines
13 KiB
C
/****************************************************************************
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* arch/arm/src/xmc4/xmc4_lowputc.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <errno.h>
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#include <arch/irq.h>
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#include <arch/board/board.h>
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#include "arm_internal.h"
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#include <assert.h>
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#include <debug.h>
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#include "xmc4_config.h"
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#include "hardware/xmc4_usic.h"
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#include "hardware/xmc4_ports.h"
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#include "hardware/xmc4_pinmux.h"
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#include "xmc4_usic.h"
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#include "xmc4_gpio.h"
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#include "xmc4_lowputc.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Select UART parameters for the selected console */
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#if defined(HAVE_UART_CONSOLE)
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# if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_CHAN USIC0_CHAN0
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# define CONSOLE_FREQ BOARD_CORECLK_FREQ
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# define CONSOLE_DX BOARD_UART0_DX
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# define CONSOLE_BAUD CONFIG_UART0_BAUD
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# define CONSOLE_BITS CONFIG_UART0_BITS
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# define CONSOLE_2STOP CONFIG_UART0_2STOP
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# define CONSOLE_PARITY CONFIG_UART0_PARITY
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# elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define CONSOLE_CHAN USIC0_CHAN1
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# define CONSOLE_FREQ BOARD_CORECLK_FREQ
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# define CONSOLE_DX BOARD_UART1_DX
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# define CONSOLE_BAUD CONFIG_UART1_BAUD
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# define CONSOLE_BITS CONFIG_UART1_BITS
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# define CONSOLE_2STOP CONFIG_UART1_2STOP
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# define CONSOLE_PARITY CONFIG_UART1_PARITY
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# elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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# define CONSOLE_CHAN USIC1_CHAN0
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# define CONSOLE_FREQ BOARD_BUS_FREQ
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# define CONSOLE_DX BOARD_UART2_DX
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# define CONSOLE_BAUD CONFIG_UART2_BAUD
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# define CONSOLE_BITS CONFIG_UART2_BITS
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# define CONSOLE_2STOP CONFIG_UART2_2STOP
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# define CONSOLE_PARITY CONFIG_UART2_PARITY
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# elif defined(CONFIG_UART3_SERIAL_CONSOLE)
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# define CONSOLE_CHAN USIC1_CHAN1
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# define CONSOLE_FREQ BOARD_BUS_FREQ
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# define CONSOLE_DX BOARD_UART3_DX
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# define CONSOLE_BAUD CONFIG_UART3_BAUD
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# define CONSOLE_BITS CONFIG_UART3_BITS
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# define CONSOLE_2STOP CONFIG_UART3_2STOP
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# define CONSOLE_PARITY CONFIG_UART3_PARITY
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# elif defined(CONFIG_UART4_SERIAL_CONSOLE)
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# define CONSOLE_CHAN USIC2_CHAN0
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# define CONSOLE_FREQ BOARD_BUS_FREQ
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# define CONSOLE_DX BOARD_UART4_DX
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# define CONSOLE_BAUD CONFIG_UART4_BAUD
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# define CONSOLE_BITS CONFIG_UART4_BITS
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# define CONSOLE_2STOP CONFIG_UART4_2STOP
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# define CONSOLE_PARITY CONFIG_UART4_PARITY
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# elif defined(CONFIG_UART5_SERIAL_CONSOLE)
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# define CONSOLE_CHAN USIC2_CHAN1
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# define CONSOLE_FREQ BOARD_BUS_FREQ
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# define CONSOLE_DX BOARD_UART5_DX
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# define CONSOLE_BAUD CONFIG_UART5_BAUD
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# define CONSOLE_BITS CONFIG_UART5_BITS
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# define CONSOLE_2STOP CONFIG_UART5_2STOP
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# define CONSOLE_PARITY CONFIG_UART5_PARITY
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# elif defined(HAVE_UART_CONSOLE)
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# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
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# endif
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#endif /* HAVE_UART_CONSOLE */
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/* REVISIT: Oversampling is hardcoded to 16 here. Perhaps this should be in
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* the config structure.
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*/
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#define UART_OVERSAMPLING 16
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/****************************************************************************
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* Private Data
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****************************************************************************/
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#ifdef HAVE_UART_CONSOLE
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static const struct uart_config_s g_console_config =
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{
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.baud = CONSOLE_BAUD,
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.dx = CONSOLE_DX,
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.parity = CONSOLE_PARITY,
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.nbits = CONSOLE_BITS,
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.stop2 = CONSOLE_2STOP
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};
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_lowputc
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*
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* Description:
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* Output one byte on the serial console
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*
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****************************************************************************/
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void arm_lowputc(char ch)
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{
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#ifdef HAVE_UART_CONSOLE
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uintptr_t base;
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uint32_t regval;
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/* Get the base address of the USIC registers associated with this
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* channel
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*/
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base = xmc4_channel_baseaddress(CONSOLE_CHAN);
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DEBUGASSERT(base != 0);
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/* Wait for the transmit buffer/fifo to be "not full." */
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do
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{
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regval = getreg32(base + XMC4_USIC_TRBSR_OFFSET);
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}
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while ((regval & USIC_TRBSR_TFULL) != 0);
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/* Then write the character to the USIC IN register */
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putreg32((uint32_t)ch, base + XMC4_USIC_IN_OFFSET);
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#endif
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}
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/****************************************************************************
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* Name: xmc4_lowsetup
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*
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* Description:
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* This performs basic initialization of the UART used for the serial
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* console. Its purpose is to get the console output available as soon
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* as possible.
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*
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****************************************************************************/
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void xmc4_lowsetup(void)
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{
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#ifdef HAVE_UART_DEVICE
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/* Configure UART pins for the all enabled UARTs.
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*
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* NOTE that the board must provide the definitions in the board.h header
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* file of the form like: GPIO_UARTn_RXm and GPIO_UARTn_TXm where n is
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* the USIC module, 0..(XMC_NUSIC-1), and m is the USIC channel number, 0
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* or 1.
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*
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* In additional, the board.h must provide the definition of
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* BOARD_BOARD_UARTn_DX which indicates which input pin is selected, i.e.
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* one of the 0=DXA, 1=DXB, ... 6=DXG.
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*/
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#ifdef HAVE_UART0
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xmc4_gpio_config(GPIO_UART0_RXD);
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xmc4_gpio_config(GPIO_UART0_TXD);
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#endif
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#ifdef HAVE_UART1
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xmc4_gpio_config(GPIO_UART1_RXD);
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xmc4_gpio_config(GPIO_UART1_TXD);
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#endif
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#ifdef HAVE_UART2
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xmc4_gpio_config(GPIO_UART2_RXD);
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xmc4_gpio_config(GPIO_UART2_TXD);
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#endif
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#ifdef HAVE_UART3
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xmc4_gpio_config(GPIO_UART3_RXD);
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xmc4_gpio_config(GPIO_UART3_TXD);
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#endif
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#ifdef HAVE_UART4
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xmc4_gpio_config(GPIO_UART4_RXD);
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xmc4_gpio_config(GPIO_UART4_TXD);
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#endif
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#ifdef HAVE_UART5
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xmc4_gpio_config(GPIO_UART5_RXD);
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xmc4_gpio_config(GPIO_UART5_TXD);
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#endif
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#ifdef HAVE_UART_CONSOLE
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/* Configure the console (only) now. Other UARTs will be configured
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* when the serial driver is opened.
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*/
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xmc4_uart_configure(CONSOLE_CHAN, &g_console_config);
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#endif /* HAVE_UART_CONSOLE */
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#endif /* HAVE_UART_DEVICE */
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}
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/****************************************************************************
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* Name: xmc4_uart_configure
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*
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* Description:
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* Enable and configure a USIC channel as a RS-232 UART.
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*
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* Returned Value:
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* Zero (OK) is returned on success; A negated errno value is returned to
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* indicate the nature of any failure.
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*
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****************************************************************************/
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#ifdef HAVE_UART_DEVICE
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int xmc4_uart_configure(enum usic_channel_e channel,
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const struct uart_config_s *config)
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{
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uintptr_t base;
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uint32_t regval;
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int ret;
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/* Get the base address of the USIC registers associated with this
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* channel
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*/
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base = xmc4_channel_baseaddress(channel);
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if (base == 0)
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{
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return -EINVAL;
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}
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/* Enable the USIC channel */
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ret = xmc4_enable_usic_channel(channel);
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if (ret < 0)
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{
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return ret;
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}
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/* Configure the BAUD rate.
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* REVISIT: Oversample is hardcoded to 16 here. Perhaps this should be in
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* the config structure.
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*/
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ret = xmc4_usic_baudrate(channel, config->baud, UART_OVERSAMPLING);
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/* Configure frame format.
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*
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* - Pulse length for standard UART signaling, i.e. the 0 level is
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* signaled during the complete bit time
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* - Enable Sample Majority Decision sample mode
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*/
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regval = USIC_PCR_ASCMODE_PLBIT | USIC_PCR_ASCMODE_SMD;
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/* Enable the receive and transmit status */
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regval |= USIC_PCR_ASCMODE_RSTEN | USIC_PCR_ASCMODE_TSTEN;
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/* Sampling point set equal to the half of the oversampling period */
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regval |= USIC_PCR_ASCMODE_SP((UART_OVERSAMPLING >> 1) + 1);
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/* Configure the number of stop bits */
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if (config->stop2)
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{
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regval |= USIC_PCR_ASCMODE_STPB;
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}
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putreg32(regval, base + XMC4_USIC_PCR_OFFSET);
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/* Configure Shift Control Register:
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*
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* - Set passive data level, high
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* - Transmission Mode: The shift control signal is considered active if
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* it is at 1-level. This is the setting to be programmed to allow
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* data transfers.
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* - Set word length
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* - Set frame length equal to the word length
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*/
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regval = USIC_SCTR_PDL1 | USIC_SCTR_TRM_1LEVEL |
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USIC_SCTR_FLE(config->nbits) | USIC_SCTR_WLE(config->nbits);
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putreg32(regval, base + XMC4_USIC_SCTR_OFFSET);
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/* Enable transfer buffer */
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regval = USIC_TCSR_TDEN_TDIV | USIC_TCSR_TDSSM;
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putreg32(regval, base + XMC4_USIC_TCSR_OFFSET);
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/* Clear protocol status */
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putreg32(0xffffffff, base + XMC4_USIC_PSCR_OFFSET);
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/* Configure parity */
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if (config->parity == 1)
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{
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/* Odd parrity */
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regval = USIC_CCR_PM_ODD;
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}
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else if (config->parity == 2)
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{
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/* Even parity */
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regval = USIC_CCR_PM_EVEN;
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}
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else
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{
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/* No parity */
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DEBUGASSERT(config->parity == 0);
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regval = USIC_CCR_PM_NONE;
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}
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putreg32(regval, base + XMC4_USIC_CCR_OFFSET);
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/* Set DX0CR input source path */
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regval = getreg32(base + XMC4_USIC_DX0CR_OFFSET);
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regval &= ~USIC_DXCR_DSEL_MASK;
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regval |= USIC_DXCR_DSEL_DX(config->dx);
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putreg32(regval, base + XMC4_USIC_DX0CR_OFFSET);
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/* Disable transmit FIFO */
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regval = getreg32(base + XMC4_USIC_TBCTR_OFFSET);
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regval &= ~USIC_TBCTR_SIZE_MASK;
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putreg32(regval, base + XMC4_USIC_TBCTR_OFFSET);
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/* Configure transmit FIFO
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*
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* - DPTR = 16
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* - LIMIT = 1
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* - STBTEN = 0, the trigger of the standard transmit buffer event is
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* based on the transition of the fill level from equal to below the
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* limit, not the fact being below
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* - SIZE = 16
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* - LOF = 0, A standard transmit buffer event occurs when the filling
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* level equals the limit value and gets lower due to transmission of
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* a data word
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*/
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regval &= ~(USIC_TBCTR_DPTR_MASK | USIC_TBCTR_LIMIT_MASK |
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USIC_TBCTR_STBTEN | USIC_TBCTR_SIZE_MASK | USIC_TBCTR_LOF);
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regval |= (USIC_TBCTR_DPTR(16) | USIC_TBCTR_LIMIT(1) |
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USIC_TBCTR_SIZE_16);
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putreg32(regval, base + XMC4_USIC_TBCTR_OFFSET);
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/* Disable the receive FIFO */
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regval = getreg32(base + XMC4_USIC_RBCTR_OFFSET);
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regval &= ~USIC_RBCTR_SIZE_MASK;
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putreg32(regval, base + XMC4_USIC_RBCTR_OFFSET);
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/* Configure receive FIFO.
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*
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* - DPTR = 0
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* - LIMIT = 16
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* - SIZE = 15
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* - LOF = 1, A standard receive buffer event occurs when the filling
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* level equals the limit value and gets bigger due to the reception
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* of a new data word
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*/
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regval &= ~(USIC_RBCTR_DPTR_MASK | USIC_RBCTR_LIMIT_MASK |
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USIC_RBCTR_SIZE_MASK);
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regval |= (USIC_RBCTR_DPTR(0) | USIC_RBCTR_LIMIT(15) | USIC_RBCTR_SIZE_16 |
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USIC_RBCTR_LOF);
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putreg32(regval, base + XMC4_USIC_RBCTR_OFFSET);
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/* Start UART */
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regval = getreg32(base + XMC4_USIC_CCR_OFFSET);
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regval &= ~USIC_CCR_MODE_MASK;
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regval |= USIC_CCR_MODE_ASC;
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putreg32(regval, base + XMC4_USIC_CCR_OFFSET);
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/* Set service request for UART protocol, receiver, and transmitter events.
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*
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* Set channel 0 events on service request 0
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* Set channel 1 events on service request 1
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*/
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regval = getreg32(base + XMC4_USIC_INPR_OFFSET);
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regval &= ~(USIC_INPR_TBINP_MASK | USIC_INPR_RINP_MASK |
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USIC_INPR_AINP_MASK | USIC_INPR_PINP_MASK);
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if (((unsigned int)channel & 1) != 0)
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{
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regval |= (USIC_INPR_TBINP_SR1 | USIC_INPR_RINP_SR1 |
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USIC_INPR_AINP_SR1 | USIC_INPR_PINP_SR1);
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}
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else
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{
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regval |= (USIC_INPR_TBINP_SR0 | USIC_INPR_RINP_SR0 |
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USIC_INPR_AINP_SR0 | USIC_INPR_PINP_SR0);
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}
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putreg32(regval, base + XMC4_USIC_INPR_OFFSET);
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return OK;
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}
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#endif
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