159 lines
5.1 KiB
C
159 lines
5.1 KiB
C
/****************************************************************************
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* arch/arm/src/xmc4/xmc4_timerisr.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <time.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <arch/board/board.h>
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#include "nvic.h"
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#include "clock/clock.h"
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#include "arm_internal.h"
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#include "chip.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* The SysTick counter runs on the clock selected by SYST_CSR.CLKSOURCE.
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* That selection may be either:
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*
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* CLKSOURCE=0: fSTDBY / 2
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* CLKSOURCE=1: fCPU
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*
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* In the first case, the SysTick counter would run at 16.384Khz. The most
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* common system clock of 10 msec/tick cannot be exactly represented with
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* that value.
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*
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* In the second case, the SysTick counter may run too rapidly to support
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* longer timer tick intervals. For example, if the CPU clock is 144Mhz,
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* then that 10 msec interval would correspond to a reload value of 1,440,000
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* or 0x0015f900.
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*/
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/* The desired timer interrupt frequency is provided by the definition
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* CLK_TCK (see include/time.h). CLK_TCK defines the desired number of
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* system clock ticks per second. That value is a user configurable setting
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* that defaults to 100 (100 ticks per second = 10 MS interval).
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*
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* Lets try fCPU first:
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*/
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#define SYSTICK_RELOAD ((BOARD_CPU_FREQUENCY / CLK_TCK) - 1)
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#undef USE_STDBY_CLOCK
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/* Verify that the reload value will fit in the reload register. */
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#if SYSTICK_RELOAD > 0x00ffffff
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/* No, then revert to fSTDBY */
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# undef SYSTICK_RELOAD
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# define SYSTICK_RELOAD ((BOARD_STDBY_FREQUENCY / CLK_TCK) - 1)
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# define USE_STDBY_CLOCK 1
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Function: xmc4_timerisr
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*
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* Description:
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* The timer ISR will perform a variety of services for various portions
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* of the systems.
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*
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****************************************************************************/
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static int xmc4_timerisr(int irq, uint32_t *regs, void *arg)
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{
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/* Process timer interrupt */
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nxsched_process_timer();
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return 0;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Function: up_timer_initialize
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*
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* Description:
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* This function is called during start-up to initialize
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* the timer interrupt.
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*
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****************************************************************************/
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void up_timer_initialize(void)
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{
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uint32_t regval;
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/* Set the SysTick interrupt to the default priority */
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regval = getreg32(NVIC_SYSH12_15_PRIORITY);
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regval &= ~NVIC_SYSH_PRIORITY_PR15_MASK;
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regval |= (NVIC_SYSH_PRIORITY_DEFAULT << NVIC_SYSH_PRIORITY_PR15_SHIFT);
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putreg32(regval, NVIC_SYSH12_15_PRIORITY);
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#ifndef USE_STDBY_CLOCK
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/* Note that it should not be necessary to set the SYSTICK clock source:
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* "The CLKSOURCE bit in SysTick Control and Status register is always set
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* to select the core clock."
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*
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* For the XMC4xx, fhat selection may be either:
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*
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* CLKSOURCE=0: fSTDBY / 2
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* CLKSOURCE=1: fCPU
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*/
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regval = getreg32(NVIC_SYSTICK_CTRL);
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regval |= NVIC_SYSTICK_CTRL_CLKSOURCE;
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putreg32(regval, NVIC_SYSTICK_CTRL);
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#endif
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/* Configure SysTick to interrupt at the requested rate */
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putreg32(SYSTICK_RELOAD, NVIC_SYSTICK_RELOAD);
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/* Attach the timer interrupt vector */
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irq_attach(XMC4_IRQ_SYSTICK, (xcpt_t)xmc4_timerisr, NULL);
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/* Enable SysTick interrupts */
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putreg32((NVIC_SYSTICK_CTRL_CLKSOURCE | NVIC_SYSTICK_CTRL_TICKINT |
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NVIC_SYSTICK_CTRL_ENABLE),
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NVIC_SYSTICK_CTRL);
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/* And enable the timer interrupt */
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up_enable_irq(XMC4_IRQ_SYSTICK);
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}
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