56529d2944
- migrated /README are removed from /boards - there are a lot of READMEs that should be further converted to rst. At the moment they are moved to Documentation/platforms and included in rst files
93 lines
3.7 KiB
ReStructuredText
93 lines
3.7 KiB
ReStructuredText
=========
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Zilog Z80
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=========
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**Z80 Instruction Set Simulator**. This port uses the
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`SDCC <http://sdcc.sourceforge.net/>`__ toolchain under Linux or Cygwin
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(verified using version 2.6.0). This port has been verified using only a
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Z80 instruction simulator called z80sim.
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**STATUS:** This port is complete and stable to the extent that it can
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be tested using an instruction set simulator. Refer to the NuttX board
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`README <https://github.com/apache/nuttx/blob/master/boards/z80/z80/z80sim/README.txt>`__
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file for further information.
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**XTRS: TRS-80 Model I/III/4/4P Emulator for Unix**. A very similar Z80
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port is available for `XTRS <http://www.tim-mann.org/xtrs.html>`__, the
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TRS-80 Model I/III/4/4P Emulator for Unix. That port also uses the
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`SDCC <http://sdcc.sourceforge.net/>`__ toolchain under Linux or Cygwin
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(verified using version 2.6.0).
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**STATUS:** Basically the same as for the Z80 instruction set simulator.
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This port was contributed by Jacques Pelletier. Refer to the NuttX board
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`README <https://bitbucket.org/patacongo/obsoleted/src/master/configs/xtrs/README.txt>`__
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file for further information.
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**NOTE:** This port was removed from the NuttX source tree on
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2017-11-24. It was removed because (1) it is unfinished, unverified, and
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unsupported, and (2) the TRS-80 simulation is a sub-optimal platform.i
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That platform includes a 16-bit ROM image and only a 48Kb RAM space for
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NuttX. The removed board support is still available in the ``Obsoleted``
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repository if anyone would ever like to resurrect it.
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\* A highly modified `buildroot <http://buildroot.uclibc.org/>`__ is
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available that may be used to build a NuttX-compatible ELF toolchain
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under Linux or Cygwin. Configurations are available in that buildroot
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to support ARM, Cortex-M3, avr, m68k, m68hc11, m68hc12, m9s12,
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blackfin, m32c, h8, and SuperH ports.
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The ``arch/z80`` directories contain files to support a variety of 8-bit architectures
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from ZiLOG (and spin-architectures such as the Rabbit2000). The arch/z80/src/z80
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sub-directory contains logic unique to the classic Z80 chip.
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Files in this directory include:
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``z80_head.asm``
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This is the main entry point into the Z80 program. This includes the
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handler for the RESET, power-up interrupt vector and address zero and all
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RST interrupts.
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``z80_rom.asm``
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Some architectures may have ROM located at address zero. In this case, a
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special version of the "head" logic must be used. This special "head"
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file is probably board-specific and, hence, belongs in the board-specific
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boards/z80/z80/<board-name>/src directory. This file may, however, be
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used as a model for such a board-specific file.
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z80_rom.S is enabled by specifying CONFIG_LINKER_ROM_AT_0000 in the
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configuration file.
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A board specific version in the boards/z80/z80/<board-name>/src directory
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can be used by:
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1. Define CONFIG_ARCH_HAVEHEAD
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2. Add the board-specific head file, say <filename>.asm, to
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boards/z80/z80/<board-name>/src
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3. Add a file called Make.defs in the boards/z80/z80/<board-name>/src
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directory containing the line: HEAD_ASRC = <file-name>.asm
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``Make.defs``
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This is the standard makefile fragment that must be provided in all
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chip directories. This fragment identifies the chip-specific file to
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be used in building libarch.
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``chip.h``
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This is the standard header file that must be provided in all chip
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directories.
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``z80_initialstate.c``, ``z80_copystate.c``, ``z80_restoreusercontext.asm``, and ``z80_saveusercontext.asm``
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These files implement the Z80 context switching logic
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``z80_schedulesigaction.c`` and ``z80_sigdeliver.c``
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These files implement Z80 signal handling.
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Supported Boards
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================
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.. toctree::
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:glob:
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:maxdepth: 1
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boards/*/*
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