788f91c677
This PR fixes the build for Rust Apps and D Apps on QEMU RISC-V. Previously the Rust Build selected the [incorrect Rust Target riscv64i-unknown-none-elf](https://lupyuen.github.io/articles/rust5#rust-target-is-incorrect). Now the Rust Build selects the correct Rust Target: riscv64gc-unknown-none-elf. This PR also fixes the 32-bit RISC-V Target for D Apps. D Targets ("riscv32") are named differently from Rust Targets ("riscv32gc"), this PR restores the correct Target Names. Note that Rust Apps won't build correctly for QEMU RISC-V 32-bit. This requires a [Rust Custom Target for riscv32gc](https://lupyuen.github.io/articles/rust4#custom-target-for-rust), which will make the NuttX Makefiles much more complicated. Also note that `hello_d` won't build correctly for 64-bit `rv-virt:nsh64`. To date, NuttX has never supported 64-bit RISC-V for D Apps. Modified Files: `tools/Rust.defs`: Rename the RISC-V ISA `imafdc` to `gc` for Rust Targets `tools/D.defs`: Exclude the RISC-V ISA for D Targets
67 lines
2.2 KiB
Plaintext
67 lines
2.2 KiB
Plaintext
############################################################################
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# tools/D.defs
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more
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# contributor license agreements. See the NOTICE file distributed with
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# this work for additional information regarding copyright ownership. The
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# ASF licenses this file to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance with the
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# License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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#
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############################################################################
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DC := ldmd2
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DFLAGS := -i
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ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
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DFLAGS += -g
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endif
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ifeq ($(CONFIG_DEBUG_NOOPT),y)
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DFLAGS += -O
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endif
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# Special handling for the SIM
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ifeq ($(CONFIG_ARCH_SIM),y)
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ifeq ($(CONFIG_HOST_LINUX),y)
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ifeq ($(LLVM_ARCHTYPE),x86)
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# Only for x86 based host or x64 but m32 build
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DFLAGS += -mtriple=i686-unknown-linux-$(LLVM_ABITYPE)
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else
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# For other archs, such as aarch64, arm etc
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DFLAGS += -mtriple=$(LLVM_ARCHTYPE)-unknown-linux-$(LLVM_ABITYPE)
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DFLAGS += -mcpu=$(LLVM_CPUTYPE)
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endif
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else ifeq ($(CONFIG_HOST_MACOS),y)
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DFLAGS += -mtriple=$(LLVM_ARCHTYPE)-apple-$(LLVM_ABITYPE)
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endif
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else ifeq ($(CONFIG_ARCH_RISCV),y)
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# Target triple is riscv[32|64]-unknown-none-elf
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DFLAGS += -mtriple=$(LLVM_ARCHTYPE)-unknown-none-elf
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DFLAGS += -mattr=+m,+a,+f,+d,+c
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# Handle ABI and CPU
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ifeq ($(CONFIG_ARCH_RV32),y)
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DFLAGS += -mcpu=generic-rv32
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DFLAGS += -mabi=ilp32d
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else ifeq ($(CONFIG_ARCH_RV64),y)
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DFLAGS += -mcpu=generic-rv64
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DFLAGS += -mabi=lp64d
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endif
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else
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# For arm, but there are some other archs not support yet,
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# such as xtensa, x86 bare metal, etc.
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DFLAGS += -mtriple=$(LLVM_ARCHTYPE)-none-$(LLVM_ABITYPE)
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DFLAGS += -mcpu=$(LLVM_CPUTYPE)
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endif
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