7fd92b81be
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3058 42af7a65-404d-4744-a932-0658087f49c3
102 lines
4.9 KiB
C
102 lines
4.9 KiB
C
/************************************************************************************
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* arch/avr/src/at32uc3/at32uc3_abdac.h
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*
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* Copyright (C) 2010 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_AVR_SRC_AT32UC3_AT32UC3_ABDAC_H
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#define __ARCH_AVR_SRC_AT32UC3_AT32UC3_ABDAC_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Register offsets *****************************************************************/
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#define AVR32_ABDAC_SDR_OFFSET 0x00 /* Sample Data Register */
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#define AVR32_ABDAC_CR_OFFSET 0x08 /* Control Register */
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#define AVR32_ABDAC_IMR_OFFSET 0x0c /* Interrupt Mask Register */
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#define AVR32_ABDAC_IER_OFFSET 0x10 /* Interrupt Enable Register */
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#define AVR32_ABDAC_IDR_OFFSET 0x14 /* Interrupt Disable Register */
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#define AVR32_ABDAC_ICR_OFFSET 0x18 /* Interrupt Clear Register */
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#define AVR32_ABDAC_ISR_OFFSET 0x1c /* Interrupt Status Register */
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/* Register Addresses ***************************************************************/
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#define AVR32_ABDAC_SDR (AVR32_ABDAC_BASE+AVR32_ABDAC_SDR_OFFSET)
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#define AVR32_ABDAC_CR (AVR32_ABDAC_BASE+AVR32_ABDAC_CR_OFFSET)
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#define AVR32_ABDAC_IMR (AVR32_ABDAC_BASE+AVR32_ABDAC_IMR_OFFSET)
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#define AVR32_ABDAC_IER (AVR32_ABDAC_BASE+AVR32_ABDAC_IER_OFFSET)
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#define AVR32_ABDAC_IDR (AVR32_ABDAC_BASE+AVR32_ABDAC_IDR_OFFSET)
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#define AVR32_ABDAC_ICR (AVR32_ABDAC_BASE+AVR32_ABDAC_ICR_OFFSET)
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#define AVR32_ABDAC_ISR (AVR32_ABDAC_BASE+AVR32_ABDAC_ISR_OFFSET)
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/* Register Bit-field Definitions ***************************************************/
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/* Sample Data Register Bit-field Definitions */
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/* This register contains a 32-bit data and, hence, has no bit-fiels */
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/* Control Register Bit-field Definitions */
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#define ABDAC_CR_SWAP (1 << 30) /* Bit 30: Swap Channels */
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#define ABDAC_CR_EN (1 << 31) /* Bit 31: Enable Audio Bitstream DAC */
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/* Interrupt Mask Register Bit-field Definitions */
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/* Interrupt Enable Register Bit-field Definitions */
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/* Interrupt Disable Register Bit-field Definitions */
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/* Interrupt Clear Register Bit-field Definitions */
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/* Interrupt Status Register Bit-field Definitions */
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#define ABDAC_INT_UNDERRUN (1 << 28) /* Bit 28: Underrun Interrupt Status */
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#define ABDAC_INT_TXREADY (1 << 29) /* Bit 29 TX Ready Interrupt Status */
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_AVR_SRC_AT32UC3_AT32UC3_ABDAC_H */
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