127 lines
6.1 KiB
C
127 lines
6.1 KiB
C
/****************************************************************************
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* arch/arm/src/lpc214x/lpc214x_i2c.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC214X_LPC214X_I2C_H
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#define __ARCH_ARM_SRC_LPC214X_LPC214X_I2C_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include "chip.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Register address Offsets *************************************************/
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/* Defined in chip.h */
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/* Register Address Definitions *********************************************/
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#define LPC214X_I2C0_CONSET (LPC214X_I2C0_BASE + LPC214X_I2C_ONSET_OFFSET)
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#define LPC214X_I2C0_STAT (LPC214X_I2C0_BASE + LPC214X_I2C_STAT_OFFSET)
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#define LPC214X_I2C0_DAT (LPC214X_I2C0_BASE + LPC214X_I2C_DAT_OFFSET)
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#define LPC214X_I2C0_ADR (LPC214X_I2C0_BASE + LPC214X_I2C_ADR_OFFSET)
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#define LPC214X_I2C0_SCLH (LPC214X_I2C0_BASE + LPC214X_I2C_SCLH_OFFSET)
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#define LPC214X_I2C0_SCLL (LPC214X_I2C0_BASE + LPC214X_I2C_SCLL_OFFSET)
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#define LPC214X_I2C0_CONCLR (LPC214X_I2C0_BASE + LPC214X_I2C_ONCLR_OFFSET)
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#define LPC214X_I2C1_CONSET (LPC214X_I2C1_BASE + LPC214X_I2C_ONSET_OFFSET)
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#define LPC214X_I2C1_STAT (LPC214X_I2C1_BASE + LPC214X_I2C_STAT_OFFSET)
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#define LPC214X_I2C1_DAT (LPC214X_I2C1_BASE + LPC214X_I2C_DAT_OFFSET)
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#define LPC214X_I2C1_ADR (LPC214X_I2C1_BASE + LPC214X_I2C_ADR_OFFSET)
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#define LPC214X_I2C1_SCLH (LPC214X_I2C1_BASE + LPC214X_I2C_SCLH_OFFSET)
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#define LPC214X_I2C1_SCLL (LPC214X_I2C1_BASE + LPC214X_I2C_SCLL_OFFSET)
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#define LPC214X_I2C1_CONCLR (LPC214X_I2C1_BASE + LPC214X_I2C_ONCLR_OFFSET)
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/* I2C register bit definitions *********************************************/
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/* Control Set Register (CONSET) */
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#define I2C_CONSET_AA (1 << 2) /* Bit 2: Assert acknowledge flag */
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#define I2C_CONSET_SI (1 << 3) /* Bit 3: I2C interrupt flag */
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#define I2C_CONSET_STO (1 << 4) /* Bit 4: STOP flag */
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#define I2C_CONSET_STA (1 << 5) /* Bit 5: START flag */
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#define I2C_CONSET_I2EN (1 << 6) /* Bit 6: I2C interface enable */
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/* Control Clear Register (CONCLR) */
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#define I2C_CONCLR_AAC (1 << 2) /* Bit 2: Assert acknowledge Clear bit */
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#define I2C_CONCLR_SIC (1 << 3) /* Bit 3: I2C interrupt Clear bit */
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#define I2C_CONCLR_STAC (1 << 5) /* Bit 5: START flag Clear bit */
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#define I2C_CONCLR_I2ENC (1 << 6) /* Bit 6: I2C interface Disable bit */
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/* Status Register (STAT) */
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#define I2C_STAT_SHIFT (1 << 3) /* Bits 3-7: Status bits */
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#define I2C_STAT_MASK (0xff << I2C_STAT_SHIFT)
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/* Master transmit mode */
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# define I2C_STAT_MXSTART (0 << I2C_STAT_SHIFT) /* Start transmitted */
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# define I2C_STAT_MXRSTART (2 << I2C_STAT_SHIFT) /* Repeated start transmitted */
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# define I2C_STAT_MXSLAWACK (3 << I2C_STAT_SHIFT) /* SLA+W transmitted + ACK received */
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# define I2C_STAT_MXSLAWNAK (4 << I2C_STAT_SHIFT) /* SLA+W transmitted + NAK received */
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# define I2C_STAT_MXDATAACK (5 << I2C_STAT_SHIFT) /* Data transmitted + ACK received */
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# define I2C_STAT_MXDATANAK (6 << I2C_STAT_SHIFT) /* Data transmitted + NAK received */
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# define I2C_STAT_MXARBLOST (7 << I2C_STAT_SHIFT) /* Abritration lost in SLA+W or data */
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/* Master receive mode */
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# define I2C_STAT_MRSTART (0 << I2C_STAT_SHIFT) /* Start transmitted */
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# define I2C_STAT_MRRSTART (2 << I2C_STAT_SHIFT) /* Repeated start transmitted */
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# define I2C_STAT_MRARBLOST (7 << I2C_STAT_SHIFT) /* Abritration lost in NAK bit */
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# define I2C_STAT_MRSLARACK (8 << I2C_STAT_SHIFT) /* SLA+R transmitted + ACK received */
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# define I2C_STAT_MRSLARNAK (9 << I2C_STAT_SHIFT) /* SLA+R transmitted + NAK received */
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# define I2C_STAT_MRDATAACK (10 << I2C_STAT_SHIFT) /* Data received + send ACK */
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# define I2C_STAT_MRDATANAK (11 << I2C_STAT_SHIFT) /* Data received + send NAK */
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/* Slave receive mode -- to be provided */
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/* Slave receive mode -- to be provided */
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/* Data Register (DAT) -- 8-bits of data */
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/* Slave Address Register (ADR) */
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#define I2C_ADR_GCA (1 << 0) /* Bit 0: General call enable */
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#define I2C_ADR_SHIFT 1 /* Bits 7-1: address */
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#define I2C_ADR_MASK (0x7f << I2C_ADR_SHIFT)
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/* SCL Duty Cycle Register (high half word - SCLH) - 16-bits of data */
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/* SCL Duty Cycle Register (low half word - SCLL) - 16-bits of data */
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Inline Functions
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_I2C_H */
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