134 lines
4.8 KiB
C
134 lines
4.8 KiB
C
/****************************************************************************
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* boards/arm/kl/teensy-lc/include/board.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_KL_TEENSY_LC_INCLUDE_BOARD_H
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#define __BOARDS_ARM_KL_TEENSY_LC_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* The board has a 16MHz crystal. */
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#undef BOARD_EXTCLOCK /* Crystal */
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#define BOARD_XTAL_FREQ 16000000 /* 16 MHz crystal frequency (REFCLK) */
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/* PLL Configuration.
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*
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* PLL Input frequency: PLLIN = REFCLK / PRDIV0 = 16MHz / 4 = 4 MHz
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* PLL Output frequency: PLLOUT = PLLIN * VDIV0 = 4Mhz * 24 = 96 MHz
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* MCGPLLCLK Frequency: MCGPLLCLK = 96MHz
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*/
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#define BOARD_PRDIV0 4 /* PLL External Reference Divider */
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#define BOARD_VDIV0 24 /* PLL VCO Divider (frequency multiplier) */
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#define BOARD_PLLIN_FREQ (BOARD_XTAL_FREQ / BOARD_PRDIV0)
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#define BOARD_PLLOUT_FREQ (BOARD_PLLIN_FREQ * BOARD_VDIV0)
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#define BOARD_MCGPLLCLK_FREQ BOARD_PLLOUT_FREQ
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/* MCGOUTCLK:
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* MCG output of either IRC, MCGFLLCLK, MCGPLLCLK, or MCG's external
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* reference clock that sources the core, system, bus, and flash clock.
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*
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* MCGOUTCLK = MCGPLLCLK = 96MHz
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*/
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#define BOARD_MCGOUTCLK_FREQ BOARD_MCGPLLCLK_FREQ
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/* SIM CLKDIV1 dividers.
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*
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* Core/system clock
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* MCGOUTCLK divided by OUTDIV1, clocks the ARM Cortex-M0+ core
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*
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* Bus clock
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* System clock divided by OUTDIV4, clocks the bus slaves and peripherals.
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*/
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#define BOARD_OUTDIV1 2 /* Core/system = MCGOUTCLK / 2 = 48 MHz */
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#define BOARD_OUTDIV4 2 /* Bus clock = System clock / 2 = 24 MHz */
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#define BOARD_CORECLK_FREQ (BOARD_MCGOUTCLK_FREQ / BOARD_OUTDIV1)
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#define BOARD_BUSCLK_FREQ (BOARD_CORECLK_FREQ / BOARD_OUTDIV4)
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/* PWM Configuration */
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/* TPM0 Channels */
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#define GPIO_TPM0_CH0OUT PIN_TPM0_CH0_2 // Pin 22: PTC1
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#define GPIO_TPM0_CH1OUT PIN_TPM0_CH1_2 // Pin 23: PTC2
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#define GPIO_TPM0_CH2OUT PIN_TPM0_CH2_2 // Pin 9: PTC3
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#define GPIO_TPM0_CH3OUT PIN_TPM0_CH3_1 // Pin 10: PTC4
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#define GPIO_TPM0_CH4OUT PIN_TPM0_CH4_2 // Pin 6: PTD4
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#define GPIO_TPM0_CH5OUT PIN_TPM0_CH5_3 // Pin 20: PTD5
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/* TPM1 Channels */
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#define GPIO_TPM1_CH0OUT PIN_TPM1_CH0_2 // Pin 16: PTB0
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#define GPIO_TPM1_CH1OUT PIN_TPM1_CH1_2 // Pin 17: PTB1
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/* TPM2 Channels */
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#define GPIO_TPM2_CH0OUT PIN_TPM2_CH0_1 // Pin 3: PTA1
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#define GPIO_TPM2_CH1OUT PIN_TPM2_CH1_1 // Pin 4: PTA2
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/* LED definitions **********************************************************/
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/* The Teensy LC has a single LED. */
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#define LED_STARTED 0 /* LED off */
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#define LED_HEAPALLOCATE 0 /* LED off */
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#define LED_IRQSENABLED 0 /* LED off */
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#define LED_STACKCREATED 1 /* LED on */
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#define LED_INIRQ 2 /* LED no change */
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#define LED_SIGNAL 2 /* LED no change */
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#define LED_ASSERTION 2 /* LED no change */
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#define LED_PANIC 3 /* LED flashing */
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/* SPI0 Pinout
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* ===========
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*
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*/
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/* Note that the Teensy maps SCK0 to pin 13 which conflicts with the
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* LED. Use pin 14 instead.
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*/
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#define PIN_SPI0_SCK (PIN_SPI0_SCK_3 | PIN_ALT2_PULLUP) // Pin 14: PTD1
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#define PIN_SPI0_MISO (PIN_SPI0_MISO_4 | PIN_ALT2_PULLUP) // Pin 12: PTC7
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#define PIN_SPI0_MOSI (PIN_SPI0_MOSI_3 | PIN_ALT2_PULLUP) // Pin 11: PTC6
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#define PIN_SPI1_SCK (PIN_SPI1_SCK_2 | PIN_ALT2_PULLUP) // Pin 20: PTD5
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#define PIN_SPI1_MISO (PIN_SPI1_MISO_2 | PIN_ALT2_PULLUP) // Pin 1: PTB17
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#define PIN_SPI1_MOSI (PIN_SPI0_MOSI_1 | PIN_ALT2_PULLUP) // Pin 0: PTB16
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#endif /* __BOARDS_ARM_KL_TEENSY_LC_INCLUDE_BOARD_H */
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