27aa26c2db
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5374 42af7a65-404d-4744-a932-0658087f49c3
1207 lines
33 KiB
C
1207 lines
33 KiB
C
/****************************************************************************
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* arch/sh/src/m16c/m16c_serial.c
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*
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* Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <unistd.h>
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#include <semaphore.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/serial/serial.h>
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#include <arch/serial.h>
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#include "chip.h"
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#include "up_arch.h"
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#include "up_internal.h"
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#include "os_internal.h"
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#include "m16c_uart.h"
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/* Is there any serial support? This might be the case if the board does
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* not have serial ports but supports a console through, say, an LCD.
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*/
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#if defined(CONFIG_M16C_UART0) || defined(CONFIG_M16C_UART1) || defined(CONFIG_M16C_UART2)
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/* Configuration **********************************************************/
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#ifndef M16C_XIN_PRESCALER
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# define M16C_XIN_PRESCALER 1
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#endif
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/* Make sure interrupt priorities are defined. If not, use a default of 5 */
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#ifndef M16C_S2T_PRIO
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# define M16C_S2T_PRIO 5 /* UART2 transmit interrupt priority */
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#endif
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#ifndef M16C_S2R_PRIO
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# define M16C_S2R_PRIO 5 /* UART2 receive interrupt priority */
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#endif
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#ifndef M16C_S0T_PRIO
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# define M16C_S0T_PRIO 5 /* UART0 transmit interrupt priority */
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#endif
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#ifndef M16C_S0R_PRIO
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# define M16C_S0R_PRIO 5 /* UART0 receive interrupt priority */
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#endif
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#ifndef M16C_S1T_PRIO
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# define M16C_S1T_PRIO 5 /* UART1 transmit interrupt priority */
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#endif
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#ifndef M16C_S1R_PRIO
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# define M16C_S1R_PRIO 5 /* UART1 receive interrupt priority */
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#endif
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/* Some sanity checks *******************************************************/
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/* Are there any UARTs? */
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#if !defined(CONFIG_M16C_UART0) && !defined(CONFIG_M16C_UART1) && !defined(CONFIG_M16C_UART2)
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# ifdef USE_SERIALDRIVER
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# error "Serial driver selected, but No UARTs is enabled"
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# undef USE_SERIALDRIVER
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# endif
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#endif
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/* Is there a serial console? */
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#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_M16C_UART0)
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# define HAVE_SERIALCONSOLE 1
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_M16C_UART1)
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# define HAVE_SERIALCONSOLE 1
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_M16C_UART2)
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# define HAVE_SERIALCONSOLE 1
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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#else
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# if defined(CONFIG_UART0_SERIAL_CONSOLE) || defined(CONFIG_UART1_SERIAL_CONSOLE)|| defined(CONFIG_UART2_SERIAL_CONSOLE)
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# error "Serial console selected, but corresponding UART not enabled"
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# endif
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# undef HAVE_SERIALCONSOLE
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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#endif
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#if defined(HAVE_SERIALCONSOLE) && defined(CONFIG_LCD_CONSOLE)
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# error "Both serial and LCD consoles are defined"
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#elif !defined(HAVE_SERIALCONSOLE) && !defined(CONFIG_LCD_CONSOLE)
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# warning "No console is defined"
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#endif
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#ifdef USE_SERIALDRIVER
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/* Which UART with be tty0/console and which tty1 and tty2? */
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/* CONFIG_UART0_SERIAL_CONSOLE (implies CONFIG_M16C_UART0 also defined) */
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#if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart0port /* UART0 is console */
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# define TTYS0_DEV g_uart0port /* UART0 is tty0 */
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# ifdef CONFIG_M16C_UART1
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# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
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# ifdef CONFIG_M16C_UART2
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# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
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# endif
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# else
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# ifdef CONFIG_M16C_UART2
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# define TTYS2_DEV g_uart2port /* UART2 is tty1 */
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# else
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# undef TTYS1_DEV /* No tty1 */
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# endif
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# undef TTYS2_DEV /* No tty2 */
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# endif
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/* CONFIG_UART1_SERIAL_CONSOLE (implies CONFIG_M16C_UART1 also defined) */
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart1port /* UART1 is console */
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# define TTYS0_DEV g_uart1port /* UART1 is tty0 */
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# ifdef CONFIG_M16C_UART0
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# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
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# ifdef CONFIG_M16C_UART2
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# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
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# endif
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# else
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# ifdef CONFIG_M16C_UART2
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# define TTYS2_DEV g_uart2port /* UART2 is tty1 */
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# else
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# undef TTYS1_DEV /* No tty1 */
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# endif
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# undef TTYS2_DEV /* No tty2 */
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# endif
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/* CONFIG_UART2_SERIAL_CONSOLE (implies CONFIG_M16C_UART2 also defined) */
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart2port /* UART2 is console */
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# define TTYS0_DEV g_uart2port /* UART2 is tty0 */
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# ifdef CONFIG_M16C_UART0
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# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
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# ifdef CONFIG_M16C_UART1
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# define TTYS2_DEV g_uart1port /* UART1 is tty2 */
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# endif
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# else
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# ifdef CONFIG_M16C_UART1
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# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
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# else
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# undef TTYS1_DEV /* No tty1 */
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# endif
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# undef TTYS2_DEV /* No tty2 */
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# endif
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/* No console, at least one of CONFIG_M16C_UART0/1/2 defined */
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#elif defined(CONFIG_M16C_UART0)
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# undef CONSOLE_DEV /* No console */
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# define TTYS0_DEV g_uart0port /* UART0 is tty0 */
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# ifdef CONFIG_M16C_UART1
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# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
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# ifdef CONFIG_M16C_UART2
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# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
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# endif
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# else
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# ifdef CONFIG_M16C_UART2
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# define TTYS1_DEV g_uart1port /* UART2 is tty1 */
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# else
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# undef TTYS1_DEV /* No tty1 */
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# endif
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# undef TTYS2_DEV /* No tty2 */
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# endif
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elif defined(CONFIG_M16C_UART1)
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# undef CONSOLE_DEV /* No console */
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# undef TTYS2_DEV /* No tty2 */
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# define TTYS0_DEV g_uart1port /* UART1 is tty0 */
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# ifdef CONFIG_M16C_UART2
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# define TTYS1_DEV g_uart2port /* UART2 is tty1 */
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# else
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# undef TTYS1_DEV /* No tty1 */
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# endif
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/* Otherwise, there is no console and only CONFIG_M16C_UART2 is defined */
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#else
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# undef CONSOLE_DEV /* No console */
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# define TTYS0_DEV g_uart2port /* UART2 is tty0 */
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# undef TTYS1_DEV /* No tty1 */
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# undef TTYS1_DEV /* No tty2 */
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#endif
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/* Definitions for the enable field of the device structure */
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#define M16C_RXENABLED 0x01
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#define M16C_TXENABLED 0x02
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct up_dev_s
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{
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uint32_t baud; /* Configured baud */
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uint16_t uartbase; /* Base address of UART registers */
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uint8_t uartno; /* UART number */
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volatile uint8_t ucon; /* Saved SCR value */
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volatile uint8_t ssr; /* Saved SR value (only used during interrupt processing) */
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uint8_t rcvirq; /* UART receive data available IRQ */
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uint8_t xmtirq; /* UART transmit complete IRQ */
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uint8_t enables; /* Bit 0: 1=RX enabled, Bit 1: 1=TX enabled */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (7 or 8) */
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bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static int up_setup(struct uart_dev_s *dev);
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static void up_shutdown(struct uart_dev_s *dev);
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static int up_attach(struct uart_dev_s *dev);
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static void up_detach(struct uart_dev_s *dev);
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static int up_rcvinterrupt(int irq, void *context);
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static int up_receive(struct uart_dev_s *dev, unsigned int *status);
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static void m16c_rxint(struct up_dev_s *dev, bool enable);
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static void up_rxint(struct uart_dev_s *dev, bool enable);
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static bool up_rxavailable(struct uart_dev_s *dev);
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static int up_xmtinterrupt(int irq, void *context);
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static void up_send(struct uart_dev_s *dev, int ch);
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static void m16c_txint(struct up_dev_s *dev, bool enable);
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static void up_txint(struct uart_dev_s *dev, bool enable);
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static bool up_txready(struct uart_dev_s *dev);
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/****************************************************************************
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* Private Variables
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****************************************************************************/
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struct uart_ops_s g_uart_ops =
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{
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.setup = up_setup,
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.shutdown = up_shutdown,
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.attach = up_attach,
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.detach = up_detach,
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.receive = up_receive,
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.rxint = up_rxint,
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.rxavailable = up_rxavailable,
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.send = up_send,
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.txint = up_txint,
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.txready = up_txready,
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.txempty = up_txready,
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};
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/* I/O buffers */
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#ifdef CONFIG_M16C_UART0
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static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE];
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static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE];
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#endif
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#ifdef CONFIG_M16C_UART1
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static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
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static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
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#endif
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#ifdef CONFIG_M16C_UART2
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static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE];
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static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
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#endif
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/* This describes the state of the M16C UART0 port. */
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#ifdef CONFIG_M16C_UART0
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static struct up_dev_s g_uart0priv =
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{
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.baud = CONFIG_UART0_BAUD,
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.uartbase = M16C_UART0_BASE,
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.uartno = 0,
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.rcvirq = M16C_UART0RCV_IRQ,
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.xmtirq = M16C_UART0XMT_IRQ,
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.parity = CONFIG_UART0_PARITY,
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.bits = CONFIG_UART0_BITS,
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.stopbits2 = CONFIG_UART0_2STOP,
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};
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static uart_dev_t g_uart0port =
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{
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.recv =
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{
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.size = CONFIG_UART0_RXBUFSIZE,
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.buffer = g_uart0rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART0_TXBUFSIZE,
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.buffer = g_uart0txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart0priv,
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};
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#endif
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/* This describes the state of the M16C UART1 port. */
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#ifdef CONFIG_M16C_UART1
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static struct up_dev_s g_uart1priv =
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{
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.baud = CONFIG_UART1_BAUD,
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.uartbase = M16C_UART1_BASE,
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.uartno = 1,
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.rcvirq = M16C_UART1RCV_IRQ,
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.xmtirq = M16C_UART1XMT_IRQ,
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.parity = CONFIG_UART1_PARITY,
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.bits = CONFIG_UART1_BITS,
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.stopbits2 = CONFIG_UART1_2STOP,
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};
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static uart_dev_t g_uart1port =
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{
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.recv =
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{
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.size = CONFIG_UART1_RXBUFSIZE,
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.buffer = g_uart1rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART1_TXBUFSIZE,
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.buffer = g_uart1txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart1priv,
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};
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#endif
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/* This describes the state of the M16C UART2 port. */
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#ifdef CONFIG_M16C_UART2
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static struct up_dev_s g_uart2priv =
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{
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.baud = CONFIG_UART2_BAUD,
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.uartbase = M16C_UART2_BASE,
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.uartno = 2,
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.rcvirq = M16C_UART2RCV_IRQ,
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.xmtirq = M16C_UART2XMT_IRQ,
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.parity = CONFIG_UART2_PARITY,
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.bits = CONFIG_UART2_BITS,
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.stopbits2 = CONFIG_UART2_2STOP,
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};
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static uart_dev_t g_uart2port =
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{
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.recv =
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{
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.size = CONFIG_UART2_RXBUFSIZE,
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.buffer = g_uart2rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART2_TXBUFSIZE,
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.buffer = g_uart2txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart2priv,
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_serialin
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****************************************************************************/
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static inline uint8_t up_serialin(struct up_dev_s *priv, int offset)
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{
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return getreg8(priv->uartbase + offset);
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}
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/****************************************************************************
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* Name: up_serialin16
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****************************************************************************/
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static inline uint16_t up_serialin16(struct up_dev_s *priv, int offset)
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{
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return getreg16(priv->uartbase + offset);
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}
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/****************************************************************************
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* Name: up_serialout
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****************************************************************************/
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static inline void up_serialout(struct up_dev_s *priv, int offset, uint8_t value)
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{
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putreg8(value, priv->uartbase + offset);
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}
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/****************************************************************************
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* Name: up_serialout16
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****************************************************************************/
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static inline void up_serialout16(struct up_dev_s *priv, int offset, uint16_t value)
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{
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putreg16(value, priv->uartbase + offset);
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}
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/****************************************************************************
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* Name: up_disableuartint
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****************************************************************************/
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static inline void up_disableuartint(struct up_dev_s *priv, uint8_t *penables)
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{
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uint8_t enables = priv->enables;
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m16c_txint(priv, false);
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m16c_rxint(priv, false);
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if (enables)
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{
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*penables = enables;
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}
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}
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/****************************************************************************
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* Name: up_restoreuartint
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****************************************************************************/
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static inline void up_restoreuartint(struct up_dev_s *priv, uint8_t enables)
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{
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m16c_rxint(priv, (enables & M16C_RXENABLED) != 0);
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m16c_txint(priv, (enables & M16C_TXENABLED) != 0);
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}
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/****************************************************************************
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* Name: up_waittxready
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****************************************************************************/
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#ifdef HAVE_SERIALCONSOLE
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static inline void up_waittxready(struct up_dev_s *priv)
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{
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int tmp;
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/* Limit how long we will wait for the TDR empty condition */
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for (tmp = 1000 ; tmp > 0 ; tmp--)
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{
|
|
/* Check the TI bit in the CI register. 1=Transmit buffer empty */
|
|
|
|
if ((up_serialin(priv, M16C_UART_C1) & UART_C1_TI) != 0);
|
|
{
|
|
/* The transmit buffer is empty... return */
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/****************************************************************************
|
|
* Name: ub_setbrg
|
|
*
|
|
* Description:
|
|
* Calculate the correct value for the BRG given the configured frequency
|
|
* and the desired BAUD settings.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static inline void ub_setbrg(struct up_dev_s *priv, unsigned int baud)
|
|
{
|
|
uint16_t brg;
|
|
|
|
/* The Bit Rate Generator (BRG) value can be calculated by:
|
|
*
|
|
* BRG = source-frequency / prescaler / 16 / baud rate - 1
|
|
*
|
|
* Example:
|
|
* source-frequency = 20,000,000 (20MHz)
|
|
* prescaler = 1
|
|
* baud rate = 19200
|
|
* BRG = 20,000,000/1/16/19200 - 1 = 64
|
|
*/
|
|
|
|
brg = (M16C_XIN_FREQ / (16L * M16C_XIN_PRESCALER * (uint32_t)baud)) - 1;
|
|
up_serialout(priv, M16C_UART_BRG, brg);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_setup
|
|
*
|
|
* Description:
|
|
* Configure the UART baud, bits, parity, fifos, etc. This
|
|
* method is called the first time that the serial port is
|
|
* opened.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_setup(struct uart_dev_s *dev)
|
|
{
|
|
#ifndef CONFIG_SUPPRESS_UART_CONFIG
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
uint8_t regval;
|
|
|
|
/* Set the baud rate generator */
|
|
|
|
ub_setbrg(priv, priv->baud);
|
|
|
|
/* Disable CTS/RTS */
|
|
|
|
up_serialout(priv, M16C_UART_C0, UART_C0_CRD);
|
|
|
|
/* Disable RX/TX interrupts */
|
|
|
|
m16c_rxint(priv, false);
|
|
m16c_txint(priv, false);
|
|
|
|
/* Set interrupt cause=TX complete and continuous receive mode */
|
|
|
|
#ifdef CONFIG_M16C_UART0
|
|
if (priv->uartno == 0)
|
|
{
|
|
regval = getreg8(M16C_UCON);
|
|
regval |= (UART_CON_U0IRS|UART_CON_U0RRM);
|
|
putreg8(regval, M16C_UCON);
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_M16C_UART1
|
|
if (priv->uartno == 1)
|
|
{
|
|
regval = getreg8(M16C_UCON);
|
|
regval |= (UART_CON_U1IRS|UART_CON_U1RRM);
|
|
putreg8(regval, M16C_UCON);
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_M16C_UART2
|
|
if (priv->uartno == 2)
|
|
{
|
|
regval = getreg8(M16C_U2C1);
|
|
regval |= ((UART_C1_U2IRS|UART_C1_U2RRM);
|
|
putreg8(regval, M16C_U2C1);
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
dbg("Invalid UART #\n");
|
|
}
|
|
|
|
/* Set UART transmit/receive control register 1 to enable transmit and receive */
|
|
|
|
up_serialout(priv, M16C_UART_C1, UART_C1_TE|UART_C1_RE);
|
|
|
|
/* Set UART transmit/receive mode register data bits, stop bits, parity */
|
|
|
|
regval = 0;
|
|
|
|
if (priv->bits == 7)
|
|
{
|
|
regval |= UART_MR_SMD7BITS;
|
|
}
|
|
else if (priv->bits == 8)
|
|
{
|
|
regval |= UART_MR_SMD8BITS;
|
|
}
|
|
else if (priv->bits == 9)
|
|
{
|
|
regval |= UART_MR_SMD9BITS;
|
|
}
|
|
else
|
|
{
|
|
dbg("Invalid bits=%d\n", priv->bits);
|
|
}
|
|
|
|
if (priv->parity != 0)
|
|
{
|
|
regval |= UART_MR_PRYE;
|
|
if (priv->parity == 2)
|
|
{
|
|
regval |= UART_MR_PRY;
|
|
}
|
|
}
|
|
|
|
if (priv->stopbits2)
|
|
{
|
|
regval |= UART_MR_STPS;
|
|
}
|
|
|
|
up_serialout(priv, M16C_UART_MR, regval);
|
|
|
|
/* Set port direction registers for Rx/TX pins */
|
|
|
|
#ifdef CONFIG_M16C_UART0
|
|
if (priv->uartno == 0)
|
|
{
|
|
regval = getreg8(M16C_PD6);
|
|
regval &= ~(1 << 2); /* PD6-2:RxD1 */
|
|
regval |= (1 << 3); /* PD6-3:TxD1 */
|
|
putreg8(regval, M16C_PD6);
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_M16C_UART1
|
|
if (priv->uartno == 1)
|
|
{
|
|
regval = getreg8(M16C_PD6);
|
|
regval &= ~(1 << 6); /* PD6-6:RxD1 */
|
|
regval |= (1 << 7); /* PD6-7:TxD1 */
|
|
putreg8(regval, M16C_PD6);
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_M16C_UART2
|
|
if (priv->uartno == 2)
|
|
{
|
|
regval = getreg8(M16C_PD7);
|
|
regval &= ~(1 << 1); /* PD7-1:RxD1 */
|
|
regval &= (1 << 0); /* PD7-0:TxD1 */
|
|
putreg8(regval, M16C_PD7);
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
dbg("Invalid UART #\n");
|
|
}
|
|
|
|
/* Read any data left in the RX fifo */
|
|
|
|
regval = (uint8_t)up_serialin16(priv, M16C_UART_RB);
|
|
#endif
|
|
return OK;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_shutdown
|
|
*
|
|
* Description:
|
|
* Disable the UART. This method is called when the serial port is closed
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_shutdown(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
up_disableuartint(priv, NULL);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_attach
|
|
*
|
|
* Description:
|
|
* Configure the UART to operation in interrupt driven mode. This method is
|
|
* called when the serial port is opened. Normally, this is just after the
|
|
* the setup() method is called, however, the serial console may operate in
|
|
* a non-interrupt driven mode during the boot phase.
|
|
*
|
|
* RX and TX interrupts are not enabled when by the attach method (unless the
|
|
* hardware supports multiple levels of interrupt enabling). The RX and TX
|
|
* interrupts are not enabled until the txint() and rxint() methods are called.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_attach(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
int ret;
|
|
|
|
/* Attach the UART receive data available IRQ */
|
|
|
|
ret = irq_attach(priv->rcvirq, up_rcvinterrupt);
|
|
if (ret == OK)
|
|
{
|
|
/* Attach the UART transmit complete IRQ */
|
|
|
|
ret = irq_attach(priv->xmtirq, up_xmtinterrupt);
|
|
if (ret != OK)
|
|
{
|
|
/* Detach the ERI interrupt on failure */
|
|
|
|
(void)irq_detach(priv->rcvirq);
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_detach
|
|
*
|
|
* Description:
|
|
* Detach UART interrupts. This method is called when the serial port is
|
|
* closed normally just before the shutdown method is called. The exception is
|
|
* the serial console which is never shutdown.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_detach(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
|
|
/* Disable all UART interrupts */
|
|
|
|
up_disableuartint(priv, NULL);
|
|
|
|
/* Detach the UART interrupts */
|
|
|
|
(void)irq_detach(priv->rcvirq);
|
|
(void)irq_detach(priv->xmtirq);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_recvinterrupt
|
|
*
|
|
* Description:
|
|
* This is the UART receive interrupt handler. It will be invoked when an
|
|
* interrupt received on the 'irq' It should call uart_receivechar to
|
|
* perform the appropriate data transfer. The interrupt handling logic
|
|
* must be able to map the 'irq' number into the approprite up_dev_s
|
|
* structure in order to call these functions.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_rcvinterrupt(int irq, void *context)
|
|
{
|
|
struct uart_dev_s *dev = NULL;
|
|
|
|
#ifdef CONFIG_M16C_UART0
|
|
if (irq == g_uart0priv.rcvirq)
|
|
{
|
|
dev = &g_uart0port;
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_M16C_UART1
|
|
if (irq == g_uart1priv.rcvirq)
|
|
{
|
|
dev = &g_uart1port;
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_M16C_UART2
|
|
if (irq = g_uart2priv.rcvirq)
|
|
{
|
|
dev = &g_uart2port;
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
PANIC(OSERR_INTERNAL);
|
|
}
|
|
|
|
/* Handle incoming, receive bytes (RDRF: Receive Data Register Full) */
|
|
|
|
uart_recvchars(dev);
|
|
return OK;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_receive
|
|
*
|
|
* Description:
|
|
* Called (usually) from the interrupt level to receive one character from
|
|
* the UART. Error bits associated with the receipt are provided in the
|
|
* return 'status'.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_receive(struct uart_dev_s *dev, unsigned int *status)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
uint16_t rb;
|
|
|
|
/* Read the character from the readbuffer */
|
|
|
|
rb = up_serialin16(priv, M16C_UART_RB);
|
|
|
|
/* Return the received byte with the receive status */
|
|
|
|
*status = rb;
|
|
|
|
/* Return the received character (up to 9 bits) */
|
|
|
|
return (int)(rb & 0x01ff);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: m16c_rxint, up_rxint
|
|
*
|
|
* Description:
|
|
* Call to enable or disable RX interrupts
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void m16c_rxint(struct up_dev_s *dev, bool enable)
|
|
{
|
|
irqstate_t flags;
|
|
uint16_t regaddr;
|
|
uint8_t regvalue;
|
|
|
|
/* Disable interrupts to prevent asynchronous accesses */
|
|
|
|
flags = irqsave();
|
|
|
|
/* Pick the SxTIC register and enable interrupt priority */
|
|
|
|
#ifdef CONFIG_M16C_UART0
|
|
if (dev->uartno == 0)
|
|
{
|
|
regaddr = M16C_S0RIC;
|
|
regvalue = M16C_S0R_PRIO;
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_M16C_UART1
|
|
if (dev->uartno == 1)
|
|
{
|
|
regaddr = M16C_S1RIC;
|
|
regvalue = M16C_S1R_PRIO;
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_M16C_UART2
|
|
if (dev->uartno == 2)
|
|
{
|
|
regaddr = M16C_S2RIC;
|
|
regvalue = M16C_S2R_PRIO;
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
dbg("Invalid UART #\n");
|
|
return;
|
|
}
|
|
|
|
/* Are we enabling or disabling? */
|
|
|
|
if (enable)
|
|
{
|
|
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
|
putreg8(regvalue, regaddr);
|
|
#endif
|
|
dev->enables |= M16C_RXENABLED;
|
|
}
|
|
else
|
|
{
|
|
putreg8(0, regaddr);
|
|
dev->enables = ~M16C_RXENABLED;
|
|
}
|
|
|
|
asm ("\tnop\n\tnop\n\tnop"); /* Three NOPs -- probably not necessary here */
|
|
irqrestore(flags);
|
|
}
|
|
|
|
static void up_rxint(struct uart_dev_s *dev, bool enable)
|
|
{
|
|
m16c_rxint((struct up_dev_s*)dev->priv, enable);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_rxavailable
|
|
*
|
|
* Description:
|
|
* Return true if the RDR is not empty
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool up_rxavailable(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
|
|
/* Return true if there is data available in the read buffer */
|
|
|
|
return ((up_serialin(priv, M16C_UART_C1) & UART_C1_RI) != 0);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_xmtvinterrupt
|
|
*
|
|
* Description:
|
|
* This is the UART receive interrupt handler. It will be invoked
|
|
* when an interrupt received on the 'irq' It should call
|
|
* uart_transmitchars or uart_receivechar to perform the
|
|
* appropriate data transfers. The interrupt handling logic\
|
|
* must be able to map the 'irq' number into the approprite
|
|
* up_dev_s structure in order to call these functions.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_xmtinterrupt(int irq, void *context)
|
|
{
|
|
struct uart_dev_s *dev = NULL;
|
|
|
|
#ifdef CONFIG_M16C_UART0
|
|
if (irq == g_uart0priv.xmtirq)
|
|
{
|
|
dev = &g_uart0port;
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_M16C_UART1
|
|
if (irq == g_uart1priv.xmtirq)
|
|
{
|
|
dev = &g_uart1port;
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_M16C_UART2
|
|
if (irq == g_uart2priv.xmtirq)
|
|
{
|
|
dev = &g_uart1port;
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
PANIC(OSERR_INTERNAL);
|
|
}
|
|
|
|
/* Handle outgoing, transmit bytes */
|
|
|
|
uart_xmitchars(dev);
|
|
return OK;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_send
|
|
*
|
|
* Description:
|
|
* This method will send one byte on the UART
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_send(struct uart_dev_s *dev, int ch)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
|
|
/* Write the data to the transmit buffer */
|
|
|
|
up_serialout16(priv, M16C_UART_TB, (uint16_t)ch);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: m16c_txint, up_txint
|
|
*
|
|
* Description:
|
|
* Call to enable or disable TX interrupts
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void m16c_txint(struct up_dev_s *dev, bool enable)
|
|
{
|
|
irqstate_t flags;
|
|
uint16_t regaddr;
|
|
uint8_t regvalue;
|
|
|
|
/* Disable interrupts to prevent asynchronous accesses */
|
|
|
|
flags = irqsave();
|
|
|
|
/* Pick the SxTIC register and enable interrupt priority */
|
|
|
|
#ifdef CONFIG_M16C_UART0
|
|
if (dev->uartno == 0)
|
|
{
|
|
regaddr = M16C_S0TIC;
|
|
regvalue = M16C_S0T_PRIO;
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_M16C_UART1
|
|
if (dev->uartno == 1)
|
|
{
|
|
regaddr = M16C_S1TIC;
|
|
regvalue = M16C_S1T_PRIO;
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_M16C_UART2
|
|
if (dev->uartno == 2)
|
|
{
|
|
regaddr = M16C_S2TIC;
|
|
regvalue = M16C_S2T_PRIO;
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
dbg("Invalid UART #\n");
|
|
return;
|
|
}
|
|
|
|
/* Are we enabling or disabling? */
|
|
|
|
if (enable)
|
|
{
|
|
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
|
putreg8(regvalue, regaddr);
|
|
#endif
|
|
dev->enables |= M16C_TXENABLED;
|
|
}
|
|
else
|
|
{
|
|
putreg8(0, regaddr);
|
|
dev->enables = ~M16C_TXENABLED;
|
|
}
|
|
|
|
asm ("\tnop\n\tnop\n\tnop"); /* Three NOPs -- probably not necessary here */
|
|
irqrestore(flags);
|
|
}
|
|
|
|
static void up_txint(struct uart_dev_s *dev, bool enable)
|
|
{
|
|
m16c_txint((struct up_dev_s*)dev->priv, enable);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_txready
|
|
*
|
|
* Description:
|
|
* Return true if the TDR is empty
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool up_txready(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
return ((up_serialin(priv, M16C_UART_C1) & UART_C1_TI) != 0);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Public Functions
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Name: up_earlyconsoleinit
|
|
*
|
|
* Description:
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|
* Performs the low level UART initialization early in
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|
* debug so that the serial console will be available
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|
* during bootup. This must be called before up_consoleinit.
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|
*
|
|
****************************************************************************/
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|
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|
void up_earlyconsoleinit(void)
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|
{
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|
/* NOTE: All GPIO configuration for the UARTs was performed in
|
|
* up_lowsetup
|
|
*/
|
|
|
|
/* Disable all UARTs */
|
|
|
|
#ifdef TTYS0_DEV
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|
up_disableuartint(TTYS0_DEV.priv, NULL);
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|
#ifdef TTYS1_DEV
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|
up_disableuartint(TTYS1_DEV.priv, NULL);
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|
#ifdef TTYS2_DEV
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|
up_disableuartint(TTYS2_DEV.priv, NULL);
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|
#endif
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|
#endif
|
|
#endif
|
|
|
|
/* Configuration whichever one is the console */
|
|
|
|
#ifdef HAVE_SERIALCONSOLE
|
|
CONSOLE_DEV.isconsole = true;
|
|
up_setup(&CONSOLE_DEV);
|
|
#endif
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_consoleinit
|
|
*
|
|
* Description:
|
|
* Register serial console and serial ports. This assumes
|
|
* that up_earlyconsoleinit was called previously.
|
|
*
|
|
****************************************************************************/
|
|
|
|
void up_consoleinit(void)
|
|
{
|
|
/* Register the console */
|
|
|
|
#ifdef HAVE_SERIALCONSOLE
|
|
(void)uart_register("/dev/console", &CONSOLE_DEV);
|
|
#endif
|
|
|
|
/* Register all UARTs */
|
|
|
|
#ifdef TTYS0_DEV
|
|
(void)uart_register("/dev/ttyS0", &TTYS0_DEV);
|
|
#ifdef TTYS1_DEV
|
|
(void)uart_register("/dev/ttyS1", &TTYS1_DEV);
|
|
#ifdef TTYS2_DEV
|
|
(void)uart_register("/dev/ttyS2", &TTYS2_DEV);
|
|
#endif
|
|
#endif
|
|
#endif
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_putc
|
|
*
|
|
* Description:
|
|
* Provide priority, low-level access to support OS debug writes
|
|
*
|
|
****************************************************************************/
|
|
|
|
int up_putc(int ch)
|
|
{
|
|
#ifdef HAVE_SERIALCONSOLE
|
|
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
|
|
uint8_t ucon;
|
|
|
|
up_disableuartint(priv, &ucon);
|
|
|
|
/* Check for LF */
|
|
|
|
if (ch == '\n')
|
|
{
|
|
/* Add CR */
|
|
|
|
up_waittxready(priv);
|
|
up_serialout16(priv, M16C_UART_TB, (uint16_t)'\r');
|
|
}
|
|
|
|
up_waittxready(priv);
|
|
up_serialout16(priv, M16C_UART_TB, (uint16_t)ch);
|
|
|
|
up_waittxready(priv);
|
|
up_restoreuartint(priv, ucon);
|
|
#endif
|
|
return ch;
|
|
}
|
|
|
|
#else /* USE_SERIALDRIVER */
|
|
|
|
/****************************************************************************
|
|
* Name: up_putc
|
|
*
|
|
* Description:
|
|
* Provide priority, low-level access to support OS debug writes
|
|
*
|
|
****************************************************************************/
|
|
|
|
int up_putc(int ch)
|
|
{
|
|
#ifdef HAVE_SERIALCONSOLE
|
|
/* Check for LF */
|
|
|
|
if (ch == '\n')
|
|
{
|
|
/* Add CR */
|
|
|
|
up_lowputc('\r');
|
|
}
|
|
|
|
up_lowputc(ch);
|
|
#endif
|
|
return ch;
|
|
}
|
|
|
|
#endif /* USE_SERIALDRIVER */
|
|
#elif defined(CONFIG_UART0_SERIAL_CONSOLE) || defined(CONFIG_UART1_SERIAL_CONSOLE)|| defined(CONFIG_UART2_SERIAL_CONSOLE)
|
|
# error "A serial console selected, but corresponding UART not enabled"
|
|
#endif /* CONFIG_M16C_UART0 || CONFIG_M16C_UART1 || CONFIG_M16C_UART2 */
|
|
|