wangbowen6 282c4104b9 tlsr82/serial: clear uart tx index when uart_reset called.
Otherwise, after the rx error occur, the tx output will be
out of sequence, for example:
normal log:
[   30.163000] 12345678abcdefgh
[   30.666000] 12345678abcdefgh
[   31.169000] 12345678abcdefgh
[   31.672000] 12345678abcdefgh
[   32.175000] 12345678abcdefgh
[   32.678000] 12345678abcdefgh
[   33.181000] 12345678abcdefgh

error log:
he 7 .20]0003 127456c8abgdefch
gde [6.707002] 16345b78afcde
fcde
fghe10010] 5234a678ebcd
 77 713 00]41238567dabchefgd
che 7 .21]0003 127456c8abgdefch
gde [8.709002] 16345b78afcde
fcde

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-09-19 17:46:42 +08:00
..
2022-09-18 21:49:32 +08:00