qinwei1 28a354f276 arm64: gicv3, add power up sequence for gc600/gc700 ... Summary: GICR_PWRR is a IMPLEMENTATION-DEFINED register for gc700/gc600, which is following gic v3 and v4. Please check GICR_PWRR define at TRM of GIC600/GIC700 for more detail Signed-off-by: qinwei1 <qinwei1@xiaomi.com>		2023-05-21 09:58:34 -03:00
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include	arm64: ARMv8-r(Cortex-R82) support( add FVP platform )	2023-03-02 13:33:15 +08:00
src	arm64: gicv3, add power up sequence for gc600/gc700	2023-05-21 09:58:34 -03:00
Kconfig	arch/arm64/Kconfig: Fix help attribute	2023-05-10 22:51:11 +08:00