bc0fe0ea16
esp32c3: aes hmac-sha1 hmac-sha256 stm32f0l0g0 stm32l1 : aes sam34: aes lpc43: aes Signed-off-by: anjiahao <anjiahao@xiaomi.com>
148 lines
3.3 KiB
Plaintext
148 lines
3.3 KiB
Plaintext
############################################################################
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# arch/arm/src/sam34/Make.defs
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more
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# contributor license agreements. See the NOTICE file distributed with
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# this work for additional information regarding copyright ownership. The
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# ASF licenses this file to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance with the
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# License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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#
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############################################################################
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# The start-up, "head", file
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# Common ARM and Cortex-M3 files
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include armv7-m/Make.defs
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# Required SAM3/4 files
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CHIP_CSRCS = sam_allocateheap.c sam_irq.c sam_lowputc.c sam_serial.c
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CHIP_CSRCS += sam_start.c
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# Configuration-dependent SAM3/4 files
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += sam_timerisr.c
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endif
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ifeq ($(CONFIG_CRYPTO_AES),y)
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CHIP_CSRCS += sam_aes.c
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endif
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ifeq ($(CONFIG_ARCH_CHIP_SAM4CM),y)
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CHIP_CSRCS += sam4cm_supc.c
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endif
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ifeq ($(CONFIG_ARCH_CHIP_SAM4L),y)
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CHIP_CSRCS += sam4l_clockconfig.c sam4l_periphclks.c sam4l_gpio.c
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else
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CHIP_CSRCS += sam_clockconfig.c sam_gpio.c sam_gpioirq.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CHIP_CSRCS += sam_userspace.c sam_mpuinit.c
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endif
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ifeq ($(CONFIG_SAM34_CMCC),y)
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CHIP_CSRCS += sam_cmcc.c
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endif
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ifeq ($(CONFIG_SAM34_DMAC0),y)
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CHIP_CSRCS += sam_dmac.c
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endif
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ifeq ($(CONFIG_ARCH_CHIP_SAM4L),y)
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ifeq ($(CONFIG_SAM34_PDCA),y)
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CHIP_CSRCS += sam4l_pdca.c
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endif
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endif
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ifeq ($(CONFIG_SAM34_EMAC),y)
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CHIP_CSRCS += sam_emac.c
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endif
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ifeq ($(CONFIG_SAM34_UDP),y)
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CHIP_CSRCS += sam_udp.c
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endif
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ifeq ($(CONFIG_SAM34_HSMCI),y)
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CHIP_CSRCS += sam_hsmci.c
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endif
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ifeq ($(CONFIG_SAM34_EXTNAND),y)
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CHIP_CSRCS += sam4s_nand.c
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endif
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ifeq ($(CONFIG_SAM34_SPI0),y)
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CHIP_CSRCS += sam_spi.c
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else
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ifeq ($(CONFIG_SAM34_SPI1),y)
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CHIP_CSRCS += sam_spi.c
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endif
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endif
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ifeq ($(CONFIG_SAM34_TWIM),y)
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CHIP_CSRCS += sam_twi.c
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endif
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ifeq ($(CONFIG_SAM34_AES),y)
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CHIP_CSRCS += sam_aes.c
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endif
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ifeq ($(CONFIG_CRYPTO_CRYPTODEV_HARDWARE),y)
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CHIP_CSRCS += sam_crypto.c
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endif
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ifeq ($(CONFIG_SAM34_RTC),y)
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CHIP_CSRCS += sam_rtc.c
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endif
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ifeq ($(CONFIG_SAM34_RTT),y)
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CHIP_CSRCS += sam_rtt.c
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endif
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ifeq ($(CONFIG_SAM34_WDT),y)
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CHIP_CSRCS += sam_wdt.c
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endif
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ifeq ($(CONFIG_TIMER),y)
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CHIP_CSRCS += sam_tc.c
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endif
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ifeq ($(CONFIG_ARCH_CHIP_SAM4CM),y)
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ifeq ($(CONFIG_SAM34_TC),y)
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CHIP_CSRCS += sam4cm_tc.c
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ifeq ($(CONFIG_SAM34_ONESHOT),y)
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CHIP_CSRCS += sam4cm_oneshot.c sam4cm_oneshot_lowerhalf.c
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endif # CONFIG_SAM34_ONESHOT
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ifeq ($(CONFIG_SAM34_FREERUN),y)
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CHIP_CSRCS += sam4cm_freerun.c
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endif # CONFIG_SAM34_FREERUN
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ifeq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += sam4cm_tickless.c
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endif # CONFIG_SCHED_TICKLESS
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endif # CONFIG_SAM34_TC
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ifeq ($(CONFIG_SMP),y)
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CHIP_CSRCS += sam4cm_cpuindex.c sam4cm_cpuidlestack.c
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CHIP_CSRCS += sam4cm_cpupause.c sam4cm_cpustart.c
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CHIP_CSRCS += sam4cm_idle.c
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endif
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endif # CONFIG_SMP
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endif # CONFIG_ARCH_CHIP_SAM4CM
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