f362d161db
arm: codestyle fixes 1
* arm: a1x: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: am335x: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: c5471: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: cxd56xx: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: dm320: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: efm32: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: imx6: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: imxrt: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: kinetis: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
257 lines
11 KiB
C
257 lines
11 KiB
C
/****************************************************************************
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* boards/arm/kinetis/kwikstik-k40/include/board.h
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* include/arch/board/board.h
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_KINETIS_KWIKSTIK-K40_INCLUDE_BOARD_H
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#define __BOARDS_ARM_KINETIS_KWIKSTIK-K40_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* The Kwikstik-K40 has a 4MHz crystal on board */
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#undef BOARD_EXTCLOCK /* Crystal */
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#define BOARD_EXTAL_FREQ 4000000 /* 4MHz crystal frequency (REFCLK) */
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#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator */
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/* PLL Configuration. NOTE: Only even frequency crystals are supported that
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* will produce a 2MHz reference clock to the PLL.
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*
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* PLL Input frequency: PLLIN = REFCLK/PRDIV = 4MHz/2 = 2MHz
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* PLL Output frequency: PLLOUT = PLLIN*VDIV = 2Mhz*48 = 96MHz
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* MCG Frequency: PLLOUT = 96MHz
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*/
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#define BOARD_PRDIV 2 /* PLL External Reference Divider */
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#define BOARD_VDIV 48 /* PLL VCO Divider (frequency multiplier) */
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#define BOARD_PLLIN_FREQ (BOARD_EXTAL_FREQ / BOARD_PRDIV)
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#define BOARD_PLLOUT_FREQ (BOARD_PLLIN_FREQ * BOARD_VDIV)
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#define BOARD_MCG_FREQ BOARD_PLLOUT_FREQ
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/* SIM CLKDIV1 dividers */
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#define BOARD_OUTDIV1 1 /* Core = MCG, 96MHz */
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#define BOARD_OUTDIV2 2 /* Bus = MCG/2, 48MHz */
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#define BOARD_OUTDIV3 2 /* FlexBus = MCG/2, 48MHz */
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#define BOARD_OUTDIV4 4 /* Flash clock = MCG/4, 24MHz */
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#define BOARD_CORECLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV1)
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#define BOARD_BUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV2)
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#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3)
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#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
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/* SDHC clocking ************************************************************/
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/* SDCLK configurations corresponding to various modes of operation.
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* Formula is:
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*
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* SDCLK frequency = (base clock) / (prescaler * divisor)
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*
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* The SDHC module is always configure configured so that the core clock is
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* the base clock.
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*/
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/* Identification mode: 400KHz = 96MHz / ( 16 * 15) */
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#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16
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#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15)
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/* MMC normal mode: 16MHz = 96MHz / (2 * 3) */
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#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
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/* SD normal mode (1-bit): 16MHz = 96MHz / (2 * 3) */
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#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
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/* SD normal mode (4-bit): 24MHz = 96MHz / (2 * 2) (with DMA)
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* SD normal mode (4-bit): 16MHz = 96MHz / (2 * 3) (no DMA)
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*/
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#ifdef CONFIG_SDIO_DMA
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# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(2)
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#else
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//# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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//# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
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# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16
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# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15)
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#endif
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/* LED definitions **********************************************************/
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/* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */
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#define LED_STARTED 0
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#define LED_HEAPALLOCATE 1
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#define LED_IRQSENABLED 2
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#define LED_STACKCREATED 3
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#define LED_INIRQ 4
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#define LED_SIGNAL 5
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#define LED_ASSERTION 6
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#define LED_PANIC 7
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/* Button definitions *******************************************************/
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/* The KwikStik-K40 board has no standard GPIO contact buttons */
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/* Alternative pin resolution ***********************************************/
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/* If there are alternative configurations for various pins in the
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* kinetis_k40pinmux.h header file, those alternative pins will be labeled
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* with a suffix like _1, _2, etc.
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* The logic in this file must select the correct pin configuration for the
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* board by defining a pin configuration (with no suffix) that maps to the
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* correct alternative.
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*/
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/* On-Board Connections
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*
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* ------------------- -------------------------- -------- -------------------
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* FEATURE CONNECTION PORT/PIN PIN FUNCTION
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* ------------------- -------------------------- -------- -------------------
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* Audio Jack Output Audio Amp On PTE28 PTE28
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* Audio Output DAC1_OUT DAC1_OUT
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* Volume Up PTD10 PTD10
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* Volume Down PTD11 PTD11
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* Buzzer Audio Out PTA8 FTM1_CH0
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* Microphone Microphone input PTA7 ADC0_SE10
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* SD Card Slot SD Clock PTE2 SDHC0_DCLK
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* SD Command PTE3 SDHC0_CMD
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* SD Data0 PTD12 SDHC0_D4
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* SD Data1 PTD13 SDHC0_D5
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* SD Data2 PTD14 SDHC0_D6
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* SD Data3 PTD15 SDHC0_D7
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* SD Card Detect PTE27 PTE27
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* SD Card On PTE6 PTE6
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* Infrared Port IR Transmit PTE4 IR_TX
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* IR Receive PTA13 CMP2_IN0
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* Touch Pads E1 / Touch PTB0 TSI0_CH0
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* E2 / Touch PTA4 TSI0_CH5
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* E3 / Touch PTA24 PTA24
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* E4 / Touch PTA25 PTA25
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* E5 / Touch PTA26 PTA26
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* E6 / Touch PTA27 PTA27
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*/
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#define PIN_FTM1_CH0 PIN_FTM1_CH0_1
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/* Connections via the General Purpose Tower Plug-in (TWRPI) Socket
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* ------------------- -------------------------- -------- -------------------
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* FEATURE CONNECTION PORT/PIN PIN FUNCTION
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* ------------------- -------------------------- -------- -------------------
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* General Purpose TWRPI AN0 (J8 Pin 8) ? ADC0_DP0/ADC1_DP3
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* TWRPI Socket TWRPI AN1 (J8 Pin 9) ? ADC0_DM0/ADC1_DM3
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* TWRPI AN2 (J8 Pin 12) ? ADC1_DP0/ADC0_DP3
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* TWRPI ID0 (J8 Pin 17) ? ADC0_DP1
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* TWRPI ID1 (J8 Pin 18) ? ADC0_DM1
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* TWRPI I2C SCL (J9 Pin 3) PTC10 I2C1_SCL
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* TWRPI I2C SDA (J9 Pin 4) PTC11 I2C1_SDA
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* TWRPI SPI MISO (J9 Pin 9) PTB23 SPI2_SIN
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* TWRPI SPI MOSI (J9 Pin 10) PTB22 SPI2_SOUT
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* TWRPI SPI SS (J9 Pin 11) PTB20 SPI2_PCS0
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* TWRPI SPI CLK (J9 Pin 12) PTB21 SPI2_SCK
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* TWRPI GPIO0 (J9 Pin 15) PTC12 PTC12
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* TWRPI GPIO1 (J9 Pin 16) PTB9 PTB9
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* TWRPI GPIO2 (J9 Pin 17) PTB10 PTB10
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* TWRPI GPIO3 (J9 Pin 18) PTC5 PTC5
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* TWRPI GPIO4 (J9 Pin 19) PTA5 PTA5
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*/
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#define PIN_I2C1_SCL PIN_I2C1_SCL_1
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#define PIN_I2C1_SDA PIN_I2C1_SDA_1
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#define PIN_SPI2_SIN PIN_SPI2_SIN_1
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#define PIN_SPI2_SOUT PIN_SPI2_SOUT_1
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#define PIN_SPI2_PCS0 PIN_SPI2_PCS0_1
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#define PIN_SPI2_SCK PIN_SPI2_SCK_1
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/* Connections via the Tower Primary Connector Side A
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* --- -------------------- --------------------------------
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* PIN NAME USAGE
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* --- -------------------- --------------------------------
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* A9 GPIO9 / CTS1 PTE10/UART_CTS
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* A43 RXD1 PTE9/UART_RX
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* A44 TXD1 PTE8/UART_TX
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* A63 RSTOUT_b PTA9/FTM1_CH1
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*/
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#define PIN_UART5_CTS PIN_UART5_CTS_2
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#define PIN_FTM1_CH1 PIN_FTM1_CH1_1
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/* Connections via the Tower Primary Connector Side B
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* --- -------------------- --------------------------------
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* PIN NAME USAGE
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* --- -------------------- --------------------------------
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* B21 GPIO1 / RTS1 PTE7/UART_RTS
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* B37 PWM7 PTA8/FTM1_CH0
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* B38 PWM6 PTA9/FTM1_CH1
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* B41 CANRX0 PTE25/CAN1_RX
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* B42 CANTX0 PTE24/CAN1_TX
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* B44 SPI0_MISO PTA17/SPI0_SIN
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* B45 SPI0_MOSI PTA16/SPI0_SOUT
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* B46 SPI0_CS0_b PTA14/SPI0_PCS0
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* B48 SPI0_CLK PTA15/SPI0_SCK
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* B50 SCL1 PTE1/I2C1_SCL
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* B51 SDA1 PTE0/I2C1_SDA
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* B52 GPIO5 / SD_CARD_DET PTA16
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*/
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#define PIN_UART3_RTS PIN_UART3_RTS_3
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#define PIN_CAN1_RX PIN_CAN1_RX_2
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#define PIN_CAN1_TX PIN_CAN1_TX_2
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#define PIN_SPI0_SIN PIN_SPI0_SIN_1
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#define PIN_SPI0_SOUT PIN_SPI0_SOUT_1
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#define PIN_SPI0_SCK PIN_SPI0_SCK_1
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#define PIN_SPI0_PCS0 PIN_SPI0_PCS0_1
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#define PIN_I2C1_SCL PIN_I2C1_SCL_2
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#define PIN_I2C1_SDA PIN_I2C1_SDA_2
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#endif /* __BOARDS_ARM_KINETIS_KWIKSTIK-K40_INCLUDE_BOARD_H */
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