225 lines
10 KiB
C
225 lines
10 KiB
C
/****************************************************************************
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* arch/mips/include/pic32mz/chip.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_MIPS_INCLUDE_PIC32MZ_CHIP_H
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#define __ARCH_MIPS_INCLUDE_PIC32MZ_CHIP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Available in 64/100/124/144 pin packages. Description here is
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* specifically for the 144 pin package (PIC32MZ2048ECH144) and should be
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* reviewed for other parts.
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*/
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#if defined(CONFIG_ARCH_CHIP_PIC32MZ2048ECH)
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# define CHIP_PIC32MZEC 1 /* PIC32MZEC family */
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# undef CHIP_PIC32MZEF /* Not PIC32MZEF family */
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# define CHIP_BOOTFLASH_KB 160 /* 160Kb boot FLASH */
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# define CHIP_PROGFLASH_KB 2048 /* 2048Kb program FLASH */
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# define CHIP_DATAMEM_KB 512 /* 512Kb data memory */
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# define CHIP_NTIMERS 9 /* 5 timers */
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# define CHIP_NIC 9 /* 5 input capture */
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# define CHIP_NOC 9 /* 5 output compare */
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# define CHIP_NUARTS 6 /* 6 UARTS */
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# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */
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# define CHIP_NSPI 6 /* 6 SPI/I2S interfaces */
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# define CHIP_NCAN 2 /* 2 CAN interfaces */
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# define CHIP_NCRTYPO 0 /* No crypto support */
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# define CHIP_RNG 1 /* 1 Random number generator */
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# define CHIP_NDMACH 8 /* 8 programmable DMA channels */
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# define CHIP_NUSBDMACHAN 16 /* 16 dedicated DMA channels */
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# define CHIP_NADC10 48 /* 48 ADC channels */
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# define CHIP_NCM 2 /* 2 Analog comparators */
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# define CHIP_USBHSOTG 1 /* 1 USB 2.0 HSOTG */
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# define CHIP_NI2C 5 /* 5 I2C interfaces */
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# define CHIP_NPMP 1 /* Have parallel master port */
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# define CHIP_NEBI 1 /* Have eternal bus interface */
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# define CHIP_NSQI 1 /* 1 Serial quad interface */
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# define CHIP_NRTCC 1 /* Has RTCC */
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# define CHIP_NETHERNET 1 /* 1 Ethernet MAC */
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# define CHIP_NPORTS 10 /* 10 ports (A-H, J-K) */
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# define CHIP_NJTAG 1 /* Has JTAG */
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# define CHIP_NTRACE 1 /* Has trace capability */
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/* Available in 64/100/124/144 pin packages. Description here is
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* specifically for the 144 pin package (PIC32MZ2048ECM144) and should
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* be reviewed for other parts.
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*/
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#elif defined(CONFIG_ARCH_CHIP_PIC32MZ2048ECM)
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# define CHIP_PIC32MZEC 1 /* PIC32MZEC family */
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# undef CHIP_PIC32MZEF /* Not PIC32MZEF family */
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# define CHIP_BOOTFLASH_KB 160 /* 160Kb boot FLASH */
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# define CHIP_PROGFLASH_KB 2048 /* 2048Kb program FLASH */
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# define CHIP_DATAMEM_KB 512 /* 512Kb data memory */
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# define CHIP_NTIMERS 9 /* 5 timers */
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# define CHIP_NIC 9 /* 5 input capture */
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# define CHIP_NOC 9 /* 5 output compare */
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# define CHIP_NUARTS 6 /* 6 UARTS */
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# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */
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# define CHIP_NSPI 6 /* 6 SPI/I2S interfaces */
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# define CHIP_NCAN 2 /* 2 CAN interfaces */
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# define CHIP_NCRTYPO 1 /* Has crypto support */
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# define CHIP_RNG 1 /* 1 Random number generator */
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# define CHIP_NDMACH 8 /* 8 programmable DMA channels */
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# define CHIP_NUSBDMACHAN 18 /* 18 dedicated DMA channels */
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# define CHIP_NADC10 48 /* 48 ADC channels */
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# define CHIP_NCM 2 /* 2 Analog comparators */
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# define CHIP_USBHSOTG 1 /* 1 USB 2.0 HSOTG */
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# define CHIP_NI2C 5 /* 5 I2C interfaces */
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# define CHIP_NPMP 1 /* Have parallel master port */
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# define CHIP_NEBI 1 /* Have eternal bus interface */
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# define CHIP_NSQI 1 /* 1 Serial quad interface */
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# define CHIP_NRTCC 1 /* Has RTCC */
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# define CHIP_NETHERNET 1 /* 1 Ethernet MAC */
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# define CHIP_NPORTS 10 /* 10 ports (A-H, J-K) */
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# define CHIP_NJTAG 1 /* Has JTAG */
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# define CHIP_NTRACE 1 /* Has trace capability */
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/* Available in 64/100/124/144 pin packages. Description here is
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* specifically for the 124 and 144 pin packages (PIC32MZ2048EFH1100, and
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* PIC32MZ2048EFH144). The PIC32MZ2048EFH1100 differs in that it has only
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* 40 ADC channels. The PIC32MZ2048EFH1064 differs in that it has only 24
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* ADC channels, two fewer SPI/I2S, one fewer I2C, and no EBI. There are
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* additional differences between all family members in the number of pins
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* how they may be mapped.
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*/
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#elif defined(CONFIG_ARCH_CHIP_PIC32MZ2048EFH)
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# undef CHIP_PIC32MZEC /* Not PIC32MZEC family */
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# define CHIP_PIC32MZEF 1 /* PIC32MZEF family */
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# define CHIP_BOOTFLASH_KB 160 /* 160Kb boot FLASH */
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# define CHIP_PROGFLASH_KB 2048 /* 2048Kb program FLASH */
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# define CHIP_DATAMEM_KB 512 /* 512Kb data memory */
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# define CHIP_NTIMERS 9 /* 5 timers */
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# define CHIP_NIC 9 /* 5 input capture */
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# define CHIP_NOC 9 /* 5 output compare */
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# define CHIP_NUARTS 6 /* 6 UARTS */
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# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */
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# define CHIP_NSPI 6 /* 6 SPI/I2S interfaces */
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# define CHIP_NCAN 2 /* 2 CAN 2.0B interfaces */
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# define CHIP_NCRTYPO 0 /* No crypto support */
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# define CHIP_RNG 1 /* 1 Random number generator */
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# define CHIP_NDMACH 8 /* 8 programmable DMA channels */
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# define CHIP_NUSBDMACHAN 16 /* 16 dedicated DMA channels */
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# define CHIP_NADC10 48 /* 48 ADC channels */
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# define CHIP_NCM 2 /* 2 Analog comparators */
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# define CHIP_USBHSOTG 1 /* 1 USB 2.0 HSOTG */
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# define CHIP_NI2C 5 /* 5 I2C interfaces */
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# define CHIP_NPMP 1 /* Have parallel master port */
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# define CHIP_NEBI 1 /* Have eternal bus interface */
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# define CHIP_NSQI 1 /* 1 Serial quad interface */
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# define CHIP_NRTCC 1 /* Has RTCC */
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# define CHIP_NETHERNET 1 /* 1 Ethernet MAC */
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# define CHIP_NPORTS 10 /* 10 ports (A-H, J-K) */
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# define CHIP_NJTAG 1 /* Has JTAG */
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# define CHIP_NTRACE 1 /* Has trace capability */
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/* Available in 64/100/124/144 pin packages. Description here is
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* specifically for the 124, and 144 pin packages (PIC32MZ2048EFM124, and
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* PIC32MZ2048EFH144). The PIC32MZ2048EFM100 differs in that it has only 40
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* ADC channels. The PIC32MZ2048EFM064 differs in that it has only 24 ADC
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* channels, two fewer SPI/I2S, one fewer I2C, and no EBI. There are
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* additional differences between all family members in the number of pins
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* how they may be mapped.
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*/
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#elif defined(CONFIG_ARCH_CHIP_PIC32MZ2048EFM)
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# undef CHIP_PIC32MZEC /* Not PIC32MZEC family */
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# define CHIP_PIC32MZEF 1 /* PIC32MZEF family */
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# define CHIP_BOOTFLASH_KB 160 /* 160Kb boot FLASH */
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# define CHIP_PROGFLASH_KB 2048 /* 2048Kb program FLASH */
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# define CHIP_DATAMEM_KB 512 /* 512Kb data memory */
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# define CHIP_NTIMERS 9 /* 5 timers */
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# define CHIP_NIC 9 /* 5 input capture */
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# define CHIP_NOC 9 /* 5 output compare */
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# define CHIP_NUARTS 6 /* 6 UARTS */
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# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */
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# define CHIP_NSPI 6 /* 6 SPI/I2S interfaces */
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# define CHIP_NCAN 2 /* 2 CAN 2.0B interfaces */
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# define CHIP_NCRTYPO 1 /* Has crypto support */
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# define CHIP_RNG 1 /* 1 Random number generator */
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# define CHIP_NDMACH 8 /* 8 programmable DMA channels */
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# define CHIP_NUSBDMACHAN 18 /* 18 dedicated DMA channels */
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# define CHIP_NADC10 48 /* 48 ADC channels */
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# define CHIP_NCM 2 /* 2 Analog comparators */
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# define CHIP_USBHSOTG 1 /* 1 USB 2.0 HSOTG */
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# define CHIP_NI2C 5 /* 5 I2C interfaces */
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# define CHIP_NPMP 1 /* Have parallel master port */
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# define CHIP_NEBI 1 /* Have eternal bus interface */
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# define CHIP_NSQI 1 /* 1 Serial quad interface */
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# define CHIP_NRTCC 1 /* Has RTCC */
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# define CHIP_NETHERNET 1 /* 1 Ethernet MAC */
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# define CHIP_NPORTS 10 /* 10 ports (A-H, J-K) */
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# define CHIP_NJTAG 1 /* Has JTAG */
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# define CHIP_NTRACE 1 /* Has trace capability */
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#else
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# error "Unrecognized PIC32MZ device"
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#endif
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/* IPL priority levels ******************************************************/
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/* These priorities will be used by the core to properly disable/mask
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* interrupts.
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*/
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#define CHIP_MIN_PRIORITY 1 /* Minimum priority. */
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#define CHIP_MAX_PRIORITY 7 /* Maximum priority. */
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#define CHIP_SW0_PRIORITY (CHIP_MAX_PRIORITY - 1) /* SW0 priority. */
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/****************************************************************************
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* Inline Functions
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_MIPS_INCLUDE_PIC32MZ_CHIP_H */
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