100 lines
2.3 KiB
CMake
100 lines
2.3 KiB
CMake
# ##############################################################################
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# arch/arm/src/stm32f0l0g0/CMakeLists.txt
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more contributor
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# license agreements. See the NOTICE file distributed with this work for
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# additional information regarding copyright ownership. The ASF licenses this
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# file to you under the Apache License, Version 2.0 (the "License"); you may not
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# use this file except in compliance with the License. You may obtain a copy of
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# the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations under
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# the License.
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#
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# ##############################################################################
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set(SRCS)
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list(
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APPEND
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SRCS
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stm32_start.c
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stm32_gpio.c
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stm32_exti_gpio.c
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stm32_irq.c
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stm32_lse.c
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stm32_lowputc.c
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stm32_serial.c
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stm32_rcc.c)
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if(CONFIG_STM32F0L0G0_DMA)
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list(APPEND SRCS stm32_dma_v1.c)
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endif()
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if(CONFIG_STM32F0L0G0_PWR)
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list(APPEND SRCS stm32_pwr.c)
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endif()
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if(NOT CONFIG_ARCH_IDLE_CUSTOM)
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list(APPEND SRCS stm32_idle.c)
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endif()
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if(NOT CONFIG_SCHED_TICKLESS)
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list(APPEND SRCS stm32_timerisr.c)
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endif()
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if(CONFIG_BUILD_PROTECTED)
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list(APPEND SRCS stm32_userspace.c)
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endif()
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if(CONFIG_STM32F0L0G0_GPIOIRQ)
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list(APPEND SRCS stm32_gpioint.c)
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endif()
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if(CONFIG_ARCH_IRQPRIO)
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list(APPEND SRCS stm32_irqprio.c)
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endif()
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if(CONFIG_STM32F0L0G0_HAVE_HSI48)
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list(APPEND SRCS stm32_hsi48.c)
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endif()
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if(CONFIG_STM32F0L0G0_USB)
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list(APPEND SRCS stm32_usbdev.c)
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endif()
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if(CONFIG_STM32F0L0G0_I2C)
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list(APPEND SRCS stm32_i2c.c)
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endif()
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if(CONFIG_STM32F0L0G0_SPI)
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list(APPEND SRCS stm32_spi.c)
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endif()
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if(CONFIG_STM32F0L0G0_PWM)
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list(APPEND SRCS stm32_pwm.c)
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endif()
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if(CONFIG_STM32F0L0G0_ADC)
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list(APPEND SRCS stm32_adc.c)
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endif()
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if(CONFIG_STM32F0L0G0_AES)
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list(APPEND SRCS stm32_aes.c)
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endif()
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if(CONFIG_STM32F0L0G0_RNG)
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list(APPEND SRCS stm32_rng.c)
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endif()
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if(CONFIG_STM32F0L0G0_TIM)
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list(APPEND SRCS stm32_tim.c stm32_tim_lowerhalf.c)
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endif()
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target_sources(arch PRIVATE ${SRCS})
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