461 lines
12 KiB
C
461 lines
12 KiB
C
/****************************************************************************
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* arch/arm/src/str71x/str71x_prccu.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include "chip.h"
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#include "arm_arch.h"
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#include "str71x.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Select set of peripherals to be enabled */
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/* APB1 periperals */
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#ifndef CONFIG_STR71X_I2C0
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# define APB1EN_I2C0 STR71X_APB1_I2C0
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#else
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# define APB1EN_I2C0 (0)
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#endif
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#ifndef CONFIG_STR71X_I2C1
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# define APB1EN_I2C1 STR71X_APB1_I2C1
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#else
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# ifndef CONFIG_STR71X_GPIO0
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# error "I2C1 requires GPIO0"
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# endif
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# ifdef CONFIG_STR71X_BSPI0
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# error "I2C1 is incompatible with BSPI0"
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# endif
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# define APB1EN_I2C1 (0)
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#endif
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#ifndef CONFIG_STR71X_UART0
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# define APB1EN_UART0 STR71X_APB1_UART0
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#else
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# ifndef CONFIG_STR71X_GPIO0
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# error "CONFIG_STR71X_UART0 requires CONFIG_STR71X_GPIO0"
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# endif
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# define APB1EN_UART0 (0)
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#endif
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#ifndef CONFIG_STR71X_UART1
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# define APB1EN_UART1 STR71X_APB1_UART1
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#else
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# ifndef CONFIG_STR71X_GPIO0
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# error "CONFIG_STR71X_UART1 requires CONFIG_STR71X_GPIO0"
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# endif
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# define APB1EN_UART1 (0)
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#endif
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#ifndef CONFIG_STR71X_UART2
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# define APB1EN_UART2 STR71X_APB1_UART2
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#else
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# ifndef CONFIG_STR71X_GPIO0
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# error "CONFIG_STR71X_UART2 requires CONFIG_STR71X_GPIO0"
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# endif
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# define APB1EN_UART2 (0)
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#endif
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#ifndef CONFIG_STR71X_UART3
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# define APB1EN_UART3 STR71X_APB1_UART3
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#else
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# ifndef CONFIG_STR71X_GPIO0
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# error "UART3 requires GPIO0"
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# endif
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# ifdef CONFIG_STR71X_BSPI0
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# error "UART3 is incompatible with BSPI0"
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# endif
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# define APB1EN_UART3 (0)
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#endif
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#ifndef CONFIG_STR71X_USB
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# define APB1EN_USB STR71X_APB1_USB
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#else
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# define APB1EN_USB (0)
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#endif
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#ifndef CONFIG_STR71X_CAN
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# define APB1EN_CAN STR71X_APB1_CAN
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#else
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# define APB1EN_CAN (0)
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#endif
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#ifndef CONFIG_STR71X_BSPI0
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# define APB1EN_BSPI0 STR71X_APB1_BSPI0
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#else
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# ifndef CONFIG_STR71X_GPIO0
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# error "BSPI0 requires GPIO0"
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# endif
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# ifdef CONFIG_STR71X_UART3
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# error "BSPI0 is incompatible with UART3"
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# endif
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# ifdef CONFIG_STR71X_I2C1
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# error "BSPI0 is incompatible with I2C1"
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# endif
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# define APB1EN_BSPI0 (0)
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#endif
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#ifndef CONFIG_STR71X_BSPI1
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# define APB1EN_BSPI1 STR71X_APB1_BSPI1
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#else
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# ifndef CONFIG_STR71X_GPIO0
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# error "BSPI1 requires GPIO0"
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# endif
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# define APB1EN_BSPI1 (0)
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#endif
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#ifndef CONFIG_STR71X_HDLC
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# define APB1EN_HDLC STR71X_APB1_HDLC
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#else
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# define APB1EN_HDLC (0)
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#endif
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#define APB1EN_ALL \
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(APB1EN_I2C0 | APB1EN_I2C1 | APB1EN_UART0 | APB1EN_UART1 | \
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APB1EN_UART2 | APB1EN_UART3 | APB1EN_USB | APB1EN_CAN | \
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APB1EN_BSPI0 | APB1EN_BSPI1 | APB1EN_HDLC)
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/* APB2 Peripherals */
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#ifndef CONFIG_STR71X_XTI
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# define APB2EN_XTI STR71X_APB2_XTI
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#else
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# define APB2EN_XTI (0)
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#endif
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#ifndef CONFIG_STR71X_GPIO0
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# define APB2EN_GPIO0 STR71X_APB2_GPIO0
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#else
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# define APB2EN_GPIO0 (0)
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#endif
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#ifndef CONFIG_STR71X_GPIO1
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# define APB2EN_GPIO1 STR71X_APB2_GPIO1
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#else
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# define APB2EN_GPIO1 (0)
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#endif
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#ifndef CONFIG_STR71X_GPIO2
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# define APB2EN_GPIO2 STR71X_APB2_GPIO2
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#else
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# define APB2EN_GPIO2 (0)
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#endif
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#ifndef CONFIG_STR71X_ADC12
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# define APB2EN_ADC12 STR71X_APB2_ADC12
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#else
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# define APB2EN_ADC12 (0)
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#endif
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#ifndef CONFIG_STR71X_CKOUT
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# define APB2EN_CKOUT STR71X_APB2_CKOUT
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#else
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# define APB2EN_CKOUT (0)
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#endif
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#define APB2EN_TIM0 (0) /* System timer -- always enabled */
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#ifndef CONFIG_STR71X_TIM1
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# define APB2EN_TIM1 STR71X_APB2_TIM1
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#else
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# define APB2EN_TIM1 (0)
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#endif
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#ifndef CONFIG_STR71X_TIM2
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# define APB2EN_TIM2 STR71X_APB2_TIM2
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#else
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# define APB2EN_TIM2 (0)
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#endif
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#ifndef CONFIG_STR71X_TIM3
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# define APB2EN_TIM3 STR71X_APB2_TIM3
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#else
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# define APB2EN_TIM3 (0)
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#endif
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#ifndef CONFIG_STR71X_RTC
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# define APB2EN_RTC STR71X_APB2_RTC
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#else
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# define APB2EN_RTC (0)
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#endif
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#define APB2EN_EIC (0) /* Interrupt controller always enabled */
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#define APB2EN_ALL \
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(APB2EN_XTI | APB2EN_GPIO0 | APB2EN_GPIO1 | APB2EN_GPIO2 | \
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APB2EN_ADC12 | APB2EN_CKOUT | APB2EN_TIM0 | APB2EN_TIM1 | \
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APB2EN_TIM2 | APB2EN_TIM3 | APB2EN_RTC | APB2EN_EIC)
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#if STR71X_PLL1OUT_MUL == 12
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# define PLL1MUL STR71X_RCCUPLL1CR_MUL12
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#elif STR71X_PLL1OUT_MUL == 16
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# define PLL1MUL STR71X_RCCUPLL1CR_MUL16
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#elif STR71X_PLL1OUT_MUL == 20
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# define PLL1MUL STR71X_RCCUPLL1CR_MUL20
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#elif STR71X_PLL1OUT_MUL == 24
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# define PLL1MUL STR71X_RCCUPLL1CR_MUL24
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#else
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# error "Unsupported value for STR71X_PLL1OUT_MUL"
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#endif
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#if STR71X_PLL1OUT_DIV == 1
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# define PLL1DIV STR71X_RCCUPLL1CR_DIV1
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#elif STR71X_PLL1OUT_DIV == 2
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# define PLL1DIV STR71X_RCCUPLL1CR_DIV2
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#elif STR71X_PLL1OUT_DIV == 3
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# define PLL1DIV STR71X_RCCUPLL1CR_DIV3
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#elif STR71X_PLL1OUT_DIV == 4
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# define PLL1DIV STR71X_RCCUPLL1CR_DIV4
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#elif STR71X_PLL1OUT_DIV == 5
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# define PLL1DIV STR71X_RCCUPLL1CR_DIV5
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#elif STR71X_PLL1OUT_DIV == 6
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# define PLL1DIV STR71X_RCCUPLL1CR_DIV6
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#elif STR71X_PLL1OUT_DIV == 7
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# define PLL1DIV STR71X_RCCUPLL1CR_DIV7
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#else
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# error "Unsupported value for STR71X_PLL1OUT_DIV"
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#endif
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#if STR71X_APB1_DIV == 1
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# define APB1DIV STR71X_PCUPDIVR_APB1DIV1
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#elif STR71X_APB1_DIV == 2
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# define APB1DIV STR71X_PCUPDIVR_APB1DIV2
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#elif STR71X_APB1_DIV == 4
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# define APB1DIV STR71X_PCUPDIVR_APB1DIV4
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#elif STR71X_APB1_DIV == 8
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# define APB1DIV STR71X_PCUPDIVR_APB1DIV8
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#else
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# error "Unsupported value for STR71X_APB1_DIV"
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#endif
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#if STR71X_APB2_DIV == 1
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# define APB2DIV STR71X_PCUPDIVR_APB2DIV1
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#elif STR71X_APB2_DIV == 2
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# define APB2DIV STR71X_PCUPDIVR_APB2DIV2
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#elif STR71X_APB2_DIV == 4
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# define APB2DIV STR71X_PCUPDIVR_APB2DIV4
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#elif STR71X_APB2_DIV == 8
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# define APB2DIV STR71X_PCUPDIVR_APB2DIV8
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#else
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# error "Unsupported value for STR71X_APB2_DIV"
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#endif
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#if STR71X_MCLK_DIV == 1
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# define MCLKDIV STR71X_PCUMDIVR_DIV1
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#elif STR71X_MCLK_DIV == 2
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# define MCLKDIV STR71X_PCUMDIVR_DIV2
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#elif STR71X_MCLK_DIV == 4
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# define MCLKDIV STR71X_PCUMDIVR_DIV4
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#elif STR71X_MCLK_DIV == 8
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# define MCLKDIV STR71X_PCUMDIVR_DIV8
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#else
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# error "Unsupported value for STR71X_MCLK_DIV"
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#endif
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#if STR71X_PLL2OUT_MUL == 12
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# define PLL2MUL STR71X_PCUPPL2CR_MUL12
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#elif STR71X_PLL2OUT_MUL == 16
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# define PLL2MUL STR71X_PCUPPL2CR_MUL16
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#elif STR71X_PLL2OUT_MUL == 20
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# define PLL2MUL STR71X_PCUPPL2CR_MUL20
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#elif STR71X_PLL2OUT_MUL == 28
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# define PLL2MUL STR71X_PCUPPL2CR_MUL28
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#else
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# error "Unsupported value for STR71X_PLL2OUT_MUL"
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#endif
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#if STR71X_PLL2OUT_DIV == 1
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# define PLL2DIV STR71X_PCUPPL2CR_DIV1
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#elif STR71X_PLL2OUT_DIV == 2
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# define PLL2DIV STR71X_PCUPPL2CR_DIV2
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#elif STR71X_PLL2OUT_DIV == 3
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# define PLL2DIV STR71X_PCUPPL2CR_DIV3
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#elif STR71X_PLL2OUT_DIV == 4
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# define PLL2DIV STR71X_PCUPPL2CR_DIV4
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#elif STR71X_PLL2OUT_DIV == 5
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# define PLL2DIV STR71X_PCUPPL2CR_DIV5
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#elif STR71X_PLL2OUT_DIV == 6
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# define PLL2DIV STR71X_PCUPPL2CR_DIV6
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#elif STR71X_PLL2OUT_DIV == 7
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# define PLL2DIV STR71X_PCUPPL2CR_DIV7
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#else
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# error "Unsupported value for STR71X_PLL2OUT_DIV"
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Funstions
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****************************************************************************/
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/****************************************************************************
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* Name: str71x_prccuinit
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*
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* Description:
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* Initialize the PCU/RCCU based on the NuttX configuration and the
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* board-specific settings in board.h
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*
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****************************************************************************/
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void str71x_prccuinit(void)
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{
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uint32_t reg32;
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uint16_t reg16;
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/* Divide RCLK to obtain PCLK1 & 2 clock for the APB1 & 2 peripherals.
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* The divider values are provided in board.h
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*/
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reg16 = getreg16(STR71X_PCU_PDIVR);
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reg16 &= ~(STR71X_PCUPDIVR_FACT1MASK | STR71X_PCUPDIVR_FACT2MASK);
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reg16 |= (APB1DIV | APB2DIV);
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putreg16(reg16, STR71X_PCU_PDIVR);
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/* Configure the main system clock (MCLK) divider with value from board.h */
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reg16 = getreg16(STR71X_PCU_MDIVR);
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reg16 &= ~STR71X_PCUMDIVR_FACTMASK;
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reg16 |= MCLKDIV;
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putreg16(reg16 , STR71X_PCU_MDIVR);
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/* Turn off the PLL1 by setting bits DX[2:0] */
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putreg32(STR71X_RCCUPLL1CR_CLK2, STR71X_RCCU_PLL1CR);
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/* Configure the PLL1CR register using the provided multiplier and
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* divider. The FREF_RANGE bit is also set if the input frequency
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* (CLK2) is greater than 3MHz.
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*/
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#if STR71X_CLK2 > 3000000
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putreg32(PLL1MUL | PLL1DIV, STR71X_RCCU_PLL1CR);
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#else
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putreg32(PLL1MUL | PLL1DIV | STR71X_RCCUPLL1CR_FREFRANGE,
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STR71X_RCCU_PLL1CR);
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#endif
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/* Wait for the PLL to lock */
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while ((getreg16(STR71X_RCCU_CFR) & STR71X_RCCUCFR_LOCK) == 0);
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/* Set the CK2_16 Bit in the CFR to use CLK2/PLL1OUT as CLK3 */
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reg32 = getreg32(STR71X_RCCU_CFR);
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reg32 |= STR71X_RCCUCFR_CK216;
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/* Should the main oscillator divided down by 2? */
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#ifdef STR71X_PLL1IN_DIV2
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reg32 |= STR71X_RCCUCFR_DIV2;
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#else
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reg32 &= ~STR71X_RCCUCFR_DIV2;
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#endif
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putreg32(reg32, STR71X_RCCU_CFR);
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/* Wait for the PLL to lock */
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while ((getreg16(STR71X_RCCU_CFR) & STR71X_RCCUCFR_LOCK) == 0);
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/* Select CLK3 (vs the alternative source) for RCLK in the clock
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* control register (CCR)
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*/
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reg16 = getreg16(STR71X_RCCU_CCR);
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reg16 &= ~STR71X_RCCUCCR_CKAFSEL;
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putreg16(reg16, STR71X_RCCU_CCR);
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/* Select PLL1OUT as the CLK3 */
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reg32 = getreg32(STR71X_RCCU_CFR);
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putreg32(reg32 | STR71X_RCCUCFR_CSUCKSEL, STR71X_RCCU_CFR);
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/* Enable clocking on selected periperals */
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putreg32(APB1EN_ALL, STR71X_APB1_CKDIS);
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putreg32(APB2EN_ALL, STR71X_APB2_CKDIS);
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/* Configure PLL2 */
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#if defined(CONFIG_STR71X_HDLC) || (defined(CONFIG_STR71X_USB) && defined(STR71X_USBIN_PLL2))
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reg16 = getreg16(STR71X_PCU_PLL2CR);
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reg16 &= ~(STR71X_PCUPPL2CR_MXMASK | STR71X_PCUPPL2CR_DXMASK);
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reg16 |= (PLL2MUL | PLL2DIV);
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/* Set the PLL2 FRQRNG bit according to the PLL2 input frequency */
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#if STR71X_PCU_HCLK_OSC < 3000000
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reg16 &= ~STR71X_PCUPPL2CR_FRQRNG;
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#else
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reg16 |= STR71X_PCUPPL2CR_FRQRNG;
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#endif
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putreg16(reg16, STR71X_PCU_PLL2CR);
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/* Wait for PLL2 to lock in */
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/* while ((getreg16(STR71X_PCU_PLL2CR) & STR71X_PCUPPL2CR_LOCK) == 0); */
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#endif
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/* Select the USB clock source */
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#ifdef CONFIG_STR71X_USB
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reg16 = getreg16(STR71X_PCU_PLL2CR);
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#ifdef STR71X_USBIN_PLL2
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/* PLL2 is the clock source to the USB */
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reg16 |= STR71X_PCUPPL2CR_USBEN;
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#else
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/* USBCLK pin is the clock source to the USB */
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reg16 &= ~STR71X_PCUPPL2CR_USBEN;
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#endif
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putreg16(reg16, STR71X_PCU_PLL2CR);
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#endif
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}
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