nuttx/boards/risc-v/mpfs/m100pfsevp
Jukka Laitinen fc41bb7f8a boards/m100pfsevp: Decrease DDR lane temination values to 40 ohm and increase BCLKSCLK_OFFSET
This fixes problems with DDR training sequence on aries m100pfs board

    - Set LIBERO_SETTING_RPC_ODT_* to 6, which matches 40 ohm. Originally it was 120 ohm (2)
    - Set BCLKSCLK_OFFSET value to 5, which matches icicle board setting

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-12-29 09:36:49 -06:00
..
configs/nsh arch/risc-v: Refine Toolchain.defs 2021-12-28 00:30:10 -06:00
include boards/m100pfsevp: Decrease DDR lane temination values to 40 ohm and increase BCLKSCLK_OFFSET 2021-12-29 09:36:49 -06:00
scripts arch/risc-v: Refine Toolchain.defs 2021-12-28 00:30:10 -06:00
src
Kconfig