2f58b55b4d
USBD has many limitation that make it hard to work properly: - only one EasyDMA channel which must be shared for all EPs - only one DMA transfer can take place at a time - some registers are unavailable during DMA transfer - in case of any problems, the peripheral silently blocks, or lose the transmitted bytes without information for the user This commit is trying to fix these problem and makes the USBS stack more reliable. Tested with high-speed CDCACM data transfers and that's the best I've been able to get in terms of stability.
398 lines
20 KiB
C
398 lines
20 KiB
C
/****************************************************************************
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* arch/arm/src/nrf52/hardware/nrf52_usbd.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_USBD_H
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#define __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_USBD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include "hardware/nrf52_memorymap.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define NRF52_USBD_INOUT_NENDPOINTS (7)
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/* Register offsets *********************************************************/
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#define NRF52_USBD_TASKS_STARTEPIN_OFFSET(n) (0x0004 + (0x04 * n))
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#define NRF52_USBD_TASKS_STARTISOIN_OFFSET (0x0024)
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#define NRF52_USBD_TASKS_STARTEPOUT_OFFSET(n) (0x0028 + (0x04 * n))
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#define NRF52_USBD_TASKS_STARTISOOUT_OFFSET (0x0048)
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#define NRF52_USBD_TASKS_EP0RCVOUT_OFFSET (0x004c)
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#define NRF52_USBD_TASKS_EP0STATUS_OFFSET (0x0050)
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#define NRF52_USBD_TASKS_EP0STALL_OFFSET (0x0054)
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#define NRF52_USBD_TASKS_DPDMDRIVE_OFFSET (0x0058)
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#define NRF52_USBD_TASKS_PDPMNODRIVE_OFFSET (0x005c)
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#define NRF52_USBD_EVENTS_USBRESET_OFFSET (0x0100)
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#define NRF52_USBD_EVENTS_STARTED_OFFSET (0x0104)
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#define NRF52_USBD_EVENTS_ENDEPIN_OFFSET(n) (0x0108 + (0x04 * n))
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#define NRF52_USBD_EVENTS_EP0DATADONE_OFFSET (0x0128)
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#define NRF52_USBD_EVENTS_ENDISOIN_OFFSET (0x012c)
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#define NRF52_USBD_EVENTS_ENDEPOUT_OFFSET(n) (0x0130 + (0x04 * n))
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#define NRF52_USBD_EVENTS_ENDISOOUT_OFFSET (0x0150)
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#define NRF52_USBD_EVENTS_SOF_OFFSET (0x0154)
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#define NRF52_USBD_EVENTS_USBEVENT_OFFSET (0x0158)
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#define NRF52_USBD_EVENTS_EP0SETUP_OFFSET (0x015c)
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#define NRF52_USBD_EVENTS_EPDATA_OFFSET (0x0160)
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#define NRF52_USBD_SHORTS_OFFSET (0x0200)
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#define NRF52_USBD_INTEN_OFFSET (0x0300)
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#define NRF52_USBD_INTENSET_OFFSET (0x0304)
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#define NRF52_USBD_INTENCLR_OFFSET (0x0308)
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#define NRF52_USBD_EVENTCAUSE_OFFSET (0x0400)
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#define NRF52_USBD_HALTED_EPIN_OFFSET(n) (0x0420 + (0x04 * n))
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#define NRF52_USBD_HALTED_EPOUT_OFFSET(n) (0x0444 + (0x04 * n))
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#define NRF52_USBD_EPSTATUS_OFFSET (0x0468)
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#define NRF52_USBD_EPDATASTATUS_OFFSET (0x046c)
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#define NRF52_USBD_USBADDR_OFFSET (0x0470)
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#define NRF52_USBD_BMREQUESTTYPE_OFFSET (0x0480)
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#define NRF52_USBD_BREQUEST_OFFSET (0x0484)
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#define NRF52_USBD_WVALUEL_OFFSET (0x0488)
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#define NRF52_USBD_WVALUEH_OFFSET (0x048c)
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#define NRF52_USBD_WINDEXL_OFFSET (0x0490)
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#define NRF52_USBD_WINDEXH_OFFSET (0x0494)
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#define NRF52_USBD_WLENGTHL_OFFSET (0x0498)
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#define NRF52_USBD_WLENGTHH_OFFSET (0x049c)
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#define NRF52_USBD_SIZE_EPOUT_OFFSET(n) (0x04A0 + (0x04 * n))
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#define NRF52_USBD_SIZE_ISOOUT_OFFSET (0x04c0)
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#define NRF52_USBD_ENABLE_OFFSET (0x0500)
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#define NRF52_USBD_USBPULLUP_OFFSET (0x0504)
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#define NRF52_USBD_DPDMVALUE_OFFSET (0x0508)
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#define NRF52_USBD_DTOGGLE_OFFSET (0x050C)
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#define NRF52_USBD_EPINEN_OFFSET (0x0510)
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#define NRF52_USBD_EPOUTEN_OFFSET (0x0514)
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#define NRF52_USBD_EPSTALL_OFFSET (0x0518)
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#define NRF52_USBD_ISOSPLIT_OFFSET (0x051c)
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#define NRF52_USBD_FRAMECNTR_OFFSET (0x0520)
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#define NRF52_USBD_LOWPOWER_OFFSET (0x052c)
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#define NRF52_USBD_ISOINCONFIG_OFFSET (0x0530)
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#define NRF52_USBD_EPIN_PTR_OFFSET(n) (0x0600 + (0x14 * n))
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#define NRF52_USBD_EPIN_MAXCNT_OFFSET(n) (0x0604 + (0x14 * n))
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#define NRF52_USBD_EPIN_AMOUNT_OFFSET(n) (0x0608 + (0x14 * n))
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#define NRF52_USBD_ISOIN_PTR_OFFSET (0x06a0)
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#define NRF52_USBD_ISOIN_MAXCNT_OFFSET (0x06a4)
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#define NRF52_USBD_ISOIN_AMOUNT_OFFSET (0x06a8)
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#define NRF52_USBD_EPOUT_PTR_OFFSET(n) (0x0700 + (0x14 * n))
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#define NRF52_USBD_EPOUT_MAXCNT_OFFSET(n) (0x0704 + (0x14 * n))
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#define NRF52_USBD_EPOUT_AMOUNT_OFFSET(n) (0x0708 + (0x14 * n))
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#define NRF52_USBD_ISOOUT_PTR_OFFSET (0x07a0)
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#define NRF52_USBD_ISOOUT_MAXCNT_OFFSET (0x07a4)
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#define NRF52_USBD_ISOOUT_AMOUNT_OFFSET (0x07a8)
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/* Register addresses *******************************************************/
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#define NRF52_USBD_TASKS_STARTEPIN(n) (NRF52_USBD_BASE + NRF52_USBD_TASKS_STARTEPIN_OFFSET(n))
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#define NRF52_USBD_TASKS_STARTISOIN (NRF52_USBD_BASE + NRF52_USBD_TASKS_STARTISOIN_OFFSET)
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#define NRF52_USBD_TASKS_STARTEPOUT(n) (NRF52_USBD_BASE + NRF52_USBD_TASKS_STARTEPOUT_OFFSET(n))
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#define NRF52_USBD_TASKS_STARTISOOUT (NRF52_USBD_BASE + NRF52_USBD_TASKS_STARTISOOUT_OFFSET)
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#define NRF52_USBD_TASKS_EP0RCVOUT (NRF52_USBD_BASE + NRF52_USBD_TASKS_EP0RCVOUT_OFFSET)
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#define NRF52_USBD_TASKS_EP0STATUS (NRF52_USBD_BASE + NRF52_USBD_TASKS_EP0STATUS_OFFSET)
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#define NRF52_USBD_TASKS_EP0STALL (NRF52_USBD_BASE + NRF52_USBD_TASKS_EP0STALL_OFFSET)
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#define NRF52_USBD_TASKS_DPDMDRIVE (NRF52_USBD_BASE + NRF52_USBD_TASKS_DPDMDRIVE_OFFSET)
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#define NRF52_USBD_TASKS_PDPMNODRIVE (NRF52_USBD_BASE + NRF52_USBD_TASKS_PDPMNODRIVE_OFFSET)
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#define NRF52_USBD_EVENTS_USBRESET (NRF52_USBD_BASE + NRF52_USBD_EVENTS_USBRESET_OFFSET)
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#define NRF52_USBD_EVENTS_STARTED (NRF52_USBD_BASE + NRF52_USBD_EVENTS_STARTED_OFFSET)
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#define NRF52_USBD_EVENTS_ENDEPIN(n) (NRF52_USBD_BASE + NRF52_USBD_EVENTS_ENDEPIN_OFFSET(n))
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#define NRF52_USBD_EVENTS_EP0DATADONE (NRF52_USBD_BASE + NRF52_USBD_EVENTS_EP0DATADONE_OFFSET)
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#define NRF52_USBD_EVENTS_ENDISOIN (NRF52_USBD_BASE + NRF52_USBD_EVENTS_ENDISOIN_OFFSEN)
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#define NRF52_USBD_EVENTS_ENDEPOUT(n) (NRF52_USBD_BASE + NRF52_USBD_EVENTS_ENDEPOUT_OFFSET(n))
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#define NRF52_USBD_EVENTS_ENDISOOUT (NRF52_USBD_BASE + NRF52_USBD_EVENTS_ENDISOOUT_OFFSET)
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#define NRF52_USBD_EVENTS_SOF (NRF52_USBD_BASE + NRF52_USBD_EVENTS_SOF_OFFSET)
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#define NRF52_USBD_EVENTS_USBEVENT (NRF52_USBD_BASE + NRF52_USBD_EVENTS_USBEVENT_OFFSET)
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#define NRF52_USBD_EVENTS_EP0SETUP (NRF52_USBD_BASE + NRF52_USBD_EVENTS_EP0SETUP_OFFSET)
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#define NRF52_USBD_EVENTS_EPDATA (NRF52_USBD_BASE + NRF52_USBD_EVENTS_EPDATA_OFFSET)
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#define NRF52_USBD_SHORTS (NRF52_USBD_BASE + NRF52_USBD_SHORTS_OFFSET)
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#define NRF52_USBD_INTEN (NRF52_USBD_BASE + NRF52_USBD_INTEN_OFFSET)
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#define NRF52_USBD_INTENSET (NRF52_USBD_BASE + NRF52_USBD_INTENSET_OFFSET)
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#define NRF52_USBD_INTENCLR (NRF52_USBD_BASE + NRF52_USBD_INTENCLR_OFFSET)
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#define NRF52_USBD_EVENTCAUSE (NRF52_USBD_BASE + NRF52_USBD_EVENTCAUSE_OFFSET)
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#define NRF52_USBD_HALTED_EPIN(n) (NRF52_USBD_BASE + NRF52_USBD_HALTED_EPIN_OFFSET(n))
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#define NRF52_USBD_HALTED_EPOUT(n) (NRF52_USBD_BASE + NRF52_USBD_HALTED_EPOUT_OFFSET(n))
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#define NRF52_USBD_EPSTATUS (NRF52_USBD_BASE + NRF52_USBD_EPSTATUS_OFFSET)
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#define NRF52_USBD_EPDATASTATUS (NRF52_USBD_BASE + NRF52_USBD_EPDATASTATUS_OFFSET)
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#define NRF52_USBD_USBADDR (NRF52_USBD_BASE + NRF52_USBD_USBADDR_OFFSET)
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#define NRF52_USBD_BMREQUESTTYPE (NRF52_USBD_BASE + NRF52_USBD_BMREQUESTTYPE_OFFSET)
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#define NRF52_USBD_BREQUEST (NRF52_USBD_BASE + NRF52_USBD_BREQUEST_OFFSET)
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#define NRF52_USBD_WVALUEL (NRF52_USBD_BASE + NRF52_USBD_WVALUEL_OFFSET)
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#define NRF52_USBD_WVALUEH (NRF52_USBD_BASE + NRF52_USBD_WVALUEH_OFFSET)
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#define NRF52_USBD_WINDEXL (NRF52_USBD_BASE + NRF52_USBD_WINDEXL_OFFSET)
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#define NRF52_USBD_WINDEXH (NRF52_USBD_BASE + NRF52_USBD_WINDEXH_OFFSET)
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#define NRF52_USBD_WLENGTHL (NRF52_USBD_BASE + NRF52_USBD_WLENGTHL_OFFSET)
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#define NRF52_USBD_WLENGTHH (NRF52_USBD_BASE + NRF52_USBD_WLENGTHH_OFFSET)
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#define NRF52_USBD_SIZE_EPOUT(n) (NRF52_USBD_BASE + NRF52_USBD_SIZE_EPOUT_OFFSET(n))
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#define NRF52_USBD_SIZE_ISOOUT (NRF52_USBD_BASE + NRF52_USBD_SIZE_ISOOUT_OFFSET)
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#define NRF52_USBD_ENABLE (NRF52_USBD_BASE + NRF52_USBD_ENABLE_OFFSET)
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#define NRF52_USBD_USBPULLUP (NRF52_USBD_BASE + NRF52_USBD_USBPULLUP_OFFSET)
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#define NRF52_USBD_DPDMVALUE (NRF52_USBD_BASE + NRF52_USBD_DPDMVALUE_OFFSET)
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#define NRF52_USBD_DTOGGLE (NRF52_USBD_BASE + NRF52_USBD_DTOGGLE_OFFSET)
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#define NRF52_USBD_EPINEN (NRF52_USBD_BASE + NRF52_USBD_EPINEN_OFFSET)
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#define NRF52_USBD_EPOUTEN (NRF52_USBD_BASE + NRF52_USBD_EPOUTEN_OFFSET)
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#define NRF52_USBD_EPSTALL (NRF52_USBD_BASE + NRF52_USBD_EPSTALL_OFFSET)
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#define NRF52_USBD_ISOSPLIT (NRF52_USBD_BASE + NRF52_USBD_ISOSPLIT_OFFSET)
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#define NRF52_USBD_FRAMECNTR (NRF52_USBD_BASE + NRF52_USBD_FRAMECNTR_OFFSET)
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#define NRF52_USBD_LOWPOWER (NRF52_USBD_BASE + NRF52_USBD_LOWPOWER_OFFSET)
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#define NRF52_USBD_ISOINCONFIG (NRF52_USBD_BASE + NRF52_USBD_ISOINCONFIG_OFFSET)
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#define NRF52_USBD_EPIN_PTR(n) (NRF52_USBD_BASE + NRF52_USBD_EPIN_PTR_OFFSET(n))
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#define NRF52_USBD_EPIN_MAXCNT(n) (NRF52_USBD_BASE + NRF52_USBD_EPIN_MAXCNT_OFFSET(n))
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#define NRF52_USBD_EPIN_AMOUNT(n) (NRF52_USBD_BASE + NRF52_USBD_EPIN_AMOUNT_OFFSET(n))
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#define NRF52_USBD_ISOIN_PTR (NRF52_USBD_BASE + NRF52_USBD_ISOIN_PTR_OFFSET)
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#define NRF52_USBD_ISOIN_MAXCNT (NRF52_USBD_BASE + NRF52_USBD_ISOIN_MAXCNT_OFFSET)
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#define NRF52_USBD_ISOIN_AMOUNT (NRF52_USBD_BASE + NRF52_USBD_ISOIN_AMOUNT_OFFSET)
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#define NRF52_USBD_EPOUT_PTR(n) (NRF52_USBD_BASE + NRF52_USBD_EPOUT_PTR_OFFSET(n))
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#define NRF52_USBD_EPOUT_MAXCNT(n) (NRF52_USBD_BASE + NRF52_USBD_EPOUT_MAXCNT_OFFSET(n))
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#define NRF52_USBD_EPOUT_AMOUNT(n) (NRF52_USBD_BASE + NRF52_USBD_EPOUT_AMOUNT_OFFSET(n))
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#define NRF52_USBD_ISOOUT_PTR (NRF52_USBD_BASE + NRF52_USBD_ISOOUT_PTR_OFFSET)
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#define NRF52_USBD_ISOOUT_MAXCNT (NRF52_USBD_BASE + NRF52_USBD_ISOOUT_MAXCNT_OFFSET)
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#define NRF52_USBD_ISOOUT_AMOUNT (NRF52_USBD_BASE + NRF52_USBD_ISOOUT_AMOUNT_OFFSET)
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/* Register bit definitions *************************************************/
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/* USBD tasks */
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#define USBD_TASKS_TRIGGER (1)
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/* USBD events */
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#define USBD_EVENT_GENERATED (1)
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/* USBD shorts */
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#define USBD_SHORTS_EP0DATADONE_STARTEPIN0 (1 << 0) /* Shortcut EP0DATADONE->TARTEPIN[0] */
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#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0 (1 << 1) /* Shortcut EP0DATADONE->STARTEPOUT[0] */
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#define USBD_SHORTS_EP0DATADONE_EP0STATUS (1 << 3) /* Shortcut EP0DATADONE->EP0STATUS */
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#define USBD_SHORTS_ENDEPOUT0_EP0STATUS (1 << 4) /* Shortcut ENDEPOUT0->EP0STATUS */
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#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT (1 << 5) /* Shortcut ENDEPOUT[0]->EP0RCVOUT */
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/* USBD interrupts */
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#define USBD_INT_USBRESET (1 << 0) /* Enable/disable interrupt USBRESET */
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#define USBD_INT_STARTED (1 << 1) /* Enable/disable interrupt STARTED */
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#define USBD_INT_ENDEPIN(n) (1 << (2 + n)) /* Enable/disable interrupt ENDEPIN[i] */
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#define USBD_INT_EP0DATADONE (1 << 10) /* Enable/disable interrupt EP0DATADONE */
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#define USBD_INT_ENDISOIN (1 << 11) /* Enable/disable interrupt ENDISOIN */
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#define USBD_INT_ENDEPOUT(n) (1 << (12 + n)) /* Enable/disable interrupt ENDEPOUT[i] */
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#define USBD_INT_ENDISOOUT (1 << 20) /* Enable/disable interrupt ENDISOOUT */
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#define USBD_INT_SOF (1 << 21) /* Enable/disable interrupt SOF */
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#define USBD_INT_USBEVENT (1 << 22) /* Enable/disable interrupt USBEVENT */
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#define USBD_INT_EP0SETUP (1 << 23) /* Enable/disable interrupt EP0SETUP */
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#define USBD_INT_EPDATA (1 << 24) /* Enable/disable interrupt EPDATA */
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#define USBD_INT_ALL (0x1fffffff)
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#define USBD_INT_ALL_NUM (25)
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/* EVENTCAUSE */
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#define USBD_EVENTCAUSE_ISOOUTCRC (1 << 0) /* CRC error */
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#define USBD_EVENTCAUSE_SUSPEND (1 << 8) /* Device suspended */
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#define USBD_EVENTCAUSE_RESUME (1 << 9) /* Device resumed */
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#define USBD_EVENTCAUSE_USBWUALLOWED (1 << 10) /* USB MAC woken up */
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#define USBD_EVENTCAUSE_READY (1 << 11) /* USB device is ready */
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/* HALTED.EPIN[n] and HALTED.EPOUT[n] */
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#define USBD_HALTED_GETSTATUS (1 << 0) /* Endpoint halted status */
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/* EPSTATUS */
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#define USBD_EPSTATUS_EPIN(n) (1 << (0 + n)) /* IN endpoint EasyDMA captured */
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#define USBD_EPSTATUS_EPOUT(n) (1 << (16 + n)) /* OUT endpoint EasyDMA captured */
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/* EPDATASTATUS */
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#define USBD_EPDATASTATUS_EPIN(n) (1 << (0 + n)) /* IN endpoint ACK */
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#define USBD_EPDATASTATUS_EPOUT(n) (1 << (16 + n)) /* OUT endpoint ACK */
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/* USBADDR */
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#define USBD_USBADDR_MASK (0x7f) /* Device USB address */
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/* BMREQUESTTYPE */
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#define USBD_BMREQUESTTYPE_RECIP_SHIFT (0) /* Data transfer type */
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#define USBD_BMREQUESTTYPE_RECIP_MASK (0x1f << USBD_BMREQUESTTYPE_RECIP_SHIFT)
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# define USBD_BMREQUESTTYPE_RECIP_DEVICE (0 << USBD_BMREQUESTTYPE_RECIP_SHIFT)
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# define USBD_BMREQUESTTYPE_RECIP_INTERFACE (1 << USBD_BMREQUESTTYPE_RECIP_SHIFT)
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# define USBD_BMREQUESTTYPE_RECIP_ENDPOINT (2 << USBD_BMREQUESTTYPE_RECIP_SHIFT)
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# define USBD_BMREQUESTTYPE_RECIP_OTHER (3 << USBD_BMREQUESTTYPE_RECIP_SHIFT)
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#define USBD_BMREQUESTTYPE_TYPE_SHIFT (5) /* Data transfer type */
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#define USBD_BMREQUESTTYPE_TYPE_MASK (0x3 << USBD_BMREQUESTTYPE_TYPE_SHIFT)
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# define USBD_BMREQUESTTYPE_TYPE_STANDARD (0 << USBD_BMREQUESTTYPE_TYPE_SHIFT)
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# define USBD_BMREQUESTTYPE_TYPE_CLASS (1 << USBD_BMREQUESTTYPE_TYPE_SHIFT)
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# define USBD_BMREQUESTTYPE_TYPE_VENDOR (2 << USBD_BMREQUESTTYPE_TYPE_SHIFT)
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#define USBD_BMREQUESTTYPE_DIR_HOST2DEV (0 << 7) /* Host-to-device */
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#define USBD_BMREQUESTTYPE_DIR_DEV2HOST (1 << 7) /* Device-to-host */
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/* BREQUEST */
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#define USBD_BREQUEST_MASK (0xff) /* SETUP data, byte 1, bRequest */
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#define USBD_BREQUEST_STD_GET_STATUS (0)
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#define USBD_BREQUEST_STD_CLEAR_FEATURE (1)
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#define USBD_BREQUEST_STD_SET_FEATURE (3)
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#define USBD_BREQUEST_STD_SET_ADDRESS (5)
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#define USBD_BREQUEST_STD_GET_DESCRIPTOR (6)
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#define USBD_BREQUEST_STD_SET_DESCRIPTOR (7)
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#define USBD_BREQUEST_STD_GET_CONFIGURATION (8)
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#define USBD_BREQUEST_STD_SET_CONFIGURATION (9)
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#define USBD_BREQUEST_STD_GET_INTERFACE (10)
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#define USBD_BREQUEST_STD_SET_INTERFACE (11)
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#define USBD_BREQUEST_STD_SYNCH_FRAME (12)
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/* WVALUEL */
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#define USBD_WVALUEL_MASK (0xff) /* SETUP data, byte 2, LSB of wValue */
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/* WVALUEH */
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#define USBD_WVALUEH_MASK (0xff) /* SETUP data, byte 3, MSB of wValue */
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/* WINDEXL */
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#define USBD_WINDEXL_MASK (0xff) /* SETUP data, byte 4, LSB of wIndex */
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/* WINDEXH */
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#define USBD_WINDEXH_MASK (0xff) /* SETUP data, byte 5, MSB of wIndex */
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/* WLENGTHL */
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#define USBD_WLENGTHL_MASK (0xff) /* SETUP data, byte 6, LSB of wLength */
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/* WLENGTHH */
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#define USBD_WLENGTHH_MASK (0xff) /* SETUP data, byte 7, MSB of wLength */
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/* SIZE.EPOUT[n] */
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#define USBD_SIZE_EPOUT_MASK (0x7f) /* EP OUT last data size */
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/* SIZE.ISOOUT */
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#define USBD_SIZE_ISOOUT_MASK (0x3ff) /* ISO OUT last data size */
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/* ENABLE */
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#define USBD_ENABLE_DISABLE (0) /* USB peripheral is disabled */
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#define USBD_ENABLE_ENABLE (1) /* USB peripheral is enabled */
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/* USBPULLUP */
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#define USBD_USBPULLUP_DISABLE (0) /* Pull-up is disconnected */
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#define USBD_USBPULLUP_ENABLE (1) /* Pull-up is connected to D+ */
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/* DPDMVALUE */
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#define USBD_DPDMVALUE_STATE_SHIFT (0) /* State D+ and D- lines will be forced into by the DPDMDRIVE task */
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#define USBD_DPDMVALUE_STATE_MASK (0x1f << USBD_DPDMVALUE_STATE_SHIFT)
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# define USBD_DPDMVALUE_STATE_RESUME (1 << USBD_DPDMVALUE_STATE_SHIFT)
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# define USBD_DPDMVALUE_STATE_J (2 << USBD_DPDMVALUE_STATE_SHIFT)
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# define USBD_DPDMVALUE_STATE_K (4 << USBD_DPDMVALUE_STATE_SHIFT)
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/* DTOGGLE */
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#define USBD_DTOGGLE_EP_SHIFT (0) /* Select bulk endpoint number */
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#define USBD_DTOGGLE_EP_MASK (0x7 << USBD_DTOGGLE_EP_SHIFT)
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# define USBD_DTOGGLE_EP(n) ((n << USBD_DTOGGLE_EP_SHIFT) & USBD_DTOGGLE_EP_MASK)
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#define USBD_DTOGGLE_IO_OUT (0 << 7)
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#define USBD_DTOGGLE_IO_IN (1 << 7)
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#define USBD_DTOGGLE_VALUE_SHIFT (8) /* Data toggle value */
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#define USBD_DTOGGLE_VALUE_MASK (0x3 << USBD_DTOGGLE_VALUE_SHIFT)
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# define USBD_DTOGGLE_VALUE_NOP (0 << USBD_DTOGGLE_VALUE_SHIFT)
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# define USBD_DTOGGLE_VALUE_DATA0 (1 << USBD_DTOGGLE_VALUE_SHIFT)
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# define USBD_DTOGGLE_VALUE_DATA1 (2 << USBD_DTOGGLE_VALUE_SHIFT)
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/* EPINEN */
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#define USBD_EPINEN_IN(n) (1 << (0 + n)) /* Enable IN endpoint i */
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#define USBD_EPINEN_ISOIN_DISABLE (0 << 8) /* Disable ISO IN endpoint */
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#define USBD_EPINEN_ISOIN_ENABLE (1 << 8) /* Enable ISO IN endpoint */
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/* EPOUTEN */
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#define USBD_EPOUTEN_OUT(n) (1 << (0 + n)) /* Enable OUT endpoint i */
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#define USBD_EPOUTEN_ISOOUT_DISABLE (0 << 8) /* Disable ISO OUT endpoint */
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#define USBD_EPOUTEN_ISOOUT_ENABLE (1 << 8) /* Enable ISO OUT endpoint */
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/* EPSTALL */
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#define USBD_EPSTALL_EP_SHIFT (0) /* Select endpoint number */
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#define USBD_EPSTALL_EP_MASK (0x7 << USBD_EPSTALL_EP_SHIFT)
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# define USBD_EPSTALL_EP(n) ((n << USBD_EPSTALL_EP_SHIFT) & USBD_EPSTALL_EP_MASK)
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#define USBD_EPSTALL_IO_OUT (0 << 7) /* Selects OUT endpoint */
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#define USBD_EPSTALL_IO_IN (1 << 7) /* Selects IN endpoint */
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#define USBD_EPSTALL_IO_UNSTALL (0 << 8) /* Don't stall selected endpoint */
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#define USBD_EPSTALL_IO_STALL (1 << 8) /* Stall selected endpoint */
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/* ISOSPLIT */
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#define USBD_ISOSPLIT_ONEDIR (0x0000)
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#define USBD_ISOSPLIT_HALFIN (0x0080)
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/* FRAMECNTR */
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#define USBD_FRAMECNTR_MASK (0x7ff)
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/* LOWPOWER */
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#define USBD_LOWPOWER_NORMAL (0)
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#define USBD_LOWPOWER_LOWPOWER (1)
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/* ISOINCONFIG */
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#define USBD_ISOINCONFIG_NORESP (0)
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#define USBD_ISOINCONFIG_ZERODATA (1)
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/* EPIN[n].MAXCNT */
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#define USBD_EPIN_MAXCNT_MASK (0x7f)
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/* EPIN[n].AMOUNT */
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#define USBD_EPIN_AMOUNT_MASK (0x7f)
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/* ISOIN.MAXCNT */
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#define USBD_ISOIN_MAXCNT_MASK (0x3ff)
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/* ISOIN.AMOUNT */
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#define USBD_ISOIN_AMOUNT_MASK (0x3ff)
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/* EPOUT[n].MAXCNT */
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#define USBD_EPOUT_MAXCNT_MASK (0x7f)
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/* EPOUT[n].AMOUNT */
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#define USBD_EPOUT_AMOUNT_MASK (0x7f)
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/* ISOOUT.MAXCNT */
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#define USBD_ISOOUT_MAXCNT_MASK (0x3ff)
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/* ISOOUT.AMOUNT */
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#define USBD_ISOOUT_AMOUNT_MASK (0x3ff)
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#endif /* __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_USBD_H */
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