nuttx/arch/risc-v
Lee Lup Yuen 31ef9cd13c risc-v/bl808: Implement Timer with OpenSBI
The implementation of the RISC-V Timer for BL808 SoC is incomplete. This PR implements the BL808 RISC-V Timer by calling OpenSBI. The code is derived from NuttX for RISC-V QEMU.

The implementation of `up_timer_initialize` with OpenSBI is explained in this article: https://lupyuen.github.io/articles/nim#appendix-opensbi-timer-for-nuttx
2024-01-04 16:27:37 +01:00
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include risc-v/k230: kernel build for CanMV-K230 board 2023-12-31 07:26:45 -08:00
src risc-v/bl808: Implement Timer with OpenSBI 2024-01-04 16:27:37 +01:00
CMakeLists.txt cmake:init RISC-V cmake qemu-rv build 2023-10-26 21:01:46 +08:00
Kconfig risc-v: Initial support for CanMV-k230 board and K230 chip 2023-12-17 01:10:57 -08:00