aef6f4ae09
The QuickFeather board added as an initial target. These featrues are minimally implemented: * Clock Configuration -- All clocking registers are defined and configuration is used to setup the HSO, M4 Core, and M4 Perif clocks. Additionally some clock debugging is stubbed for bringing out clock paths to IO pins. * UART -- The lowputc as well as the serial driver is implemnted for the single UART device. Currently the configuration is hard coded, but uses the proper interfaces to later fill in. * SysTick -- The system tick timer is implemented and clocking properly. Tickless mode is not yet implemented. * Interrupts -- The interrupt system is implemented and verified using the UART and SysTick systems. * GPIO -- GPIO and IOMUX systems are defined and implemented. This is verified using the UART as well as the Arch LED system. The GPIO interupt system is stubbed out but not implemented. * Arch LEDS -- The blue LED as part of the RGB LED is configured and attached to the Arch LED system. This indicates the device coming online as well as when a hardfault is triggered. Applications and Testing: * There is a nsh configuration implemented that includes debug features as well as the ostest, getprime, and mem test. All of these have been run and verified. Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
67 lines
2.8 KiB
C
67 lines
2.8 KiB
C
/****************************************************************************
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* boards/arm/eoss3/quickfeather/include/board.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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****************************************************************************/
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#ifndef __BOARDS_ARM_EOSS3_QUICKFEATHER_INCLUDE_BOARD_H
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#define __BOARDS_ARM_EOSS3_QUICKFEATHER_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "eoss3_gpio.h"
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#define BOARD_HCLK_FREQUENCY 79790000
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#define BOARD_CPU_FREQUENCY 79790000
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/* LED definitions **********************************************************/
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#define LED_STARTED 0 /* LED off */
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#define LED_HEAPALLOCATE 0 /* LED off */
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#define LED_IRQSENABLED 0 /* LED off */
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#define LED_STACKCREATED 1 /* LED on */
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#define LED_INIRQ 2 /* LED no change */
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#define LED_SIGNAL 2 /* LED no change */
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#define LED_ASSERTION 2 /* LED no change */
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#define LED_PANIC 3 /* LED flashing */
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#define GPIO_LED_B ((IO_REG_P18 << GPIO_REG_BIT_SHIFT) | \
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(GPIO_REG_EN_MASK) | \
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((PAD_FUNC_3) << GPIO_CTRL_SHIFT) | \
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GPIO_PIN18)
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#define GPIO_LED_G ((IO_REG_P21 << GPIO_REG_BIT_SHIFT) | \
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(GPIO_REG_EN_MASK) | \
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((PAD_FUNC_3) << GPIO_CTRL_SHIFT) | \
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GPIO_PIN21)
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#define GPIO_LED_R ((IO_REG_P22 << GPIO_REG_BIT_SHIFT) | \
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(GPIO_REG_EN_MASK) | \
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((PAD_FUNC_3) << GPIO_CTRL_SHIFT) | \
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GPIO_PIN22)
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/* UART definitions *********************************************************/
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#define GPIO_UART_RX ((UART_RXD_SEL_P45 << GPIO_INPUT_SEL_SHIFT) | \
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((PAD_OEN | PAD_REN) << GPIO_CTRL_SHIFT) | \
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GPIO_PIN45)
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#define GPIO_UART_TX (((PAD_FUNC_3) << GPIO_CTRL_SHIFT) | GPIO_PIN44)
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#endif /* __BOARDS_ARM_EOSS3_QUICKFEATHER_INCLUDE_BOARD_H */
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