86 lines
3.9 KiB
C
86 lines
3.9 KiB
C
/************************************************************************************
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* arch/arm/src/sama5/chip/sam_pit.h
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMA5_CHIP_SAM_PIT_H
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#define __ARCH_ARM_SRC_SAMA5_CHIP_SAM_PIT_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include "chip/sam_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* PIT Register Offsets *************************************************************/
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#define SAM_PIT_MR_OFFSET 0x0000 /* Mode Register */
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#define SAM_PIT_SR_OFFSET 0x0004 /* Status Register */
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#define SAM_PIT_PIVR_OFFSET 0x0008 /* Periodic Interval Value Register */
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#define SAM_PIT_PIIR_OFFSET 0x000c /* Periodic Interval Image Register */
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/* PIT Register Addresses ***********************************************************/
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#define SAM_PIT_MR (SAM_PITC_VBASE+SAM_PIT_MR_OFFSET)
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#define SAM_PIT_SR (SAM_PITC_VBASE+SAM_PIT_SR_OFFSET)
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#define SAM_PIT_PIVR (SAM_PITC_VBASE+SAM_PIT_PIVR_OFFSET)
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#define SAM_PIT_PIIR (SAM_PITC_VBASE+SAM_PIT_PIIR_OFFSET)
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/* PIT Register Bit Definitions *****************************************************/
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/* Mode Register */
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#define PIT_MR_PIV_SHIFT (0) /* Bits 0-19: Periodic Interval Value */
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#define PIT_MR_PIV_MASK (0x000fffff)
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# define PIT_MR_PIV(n) (n)
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#define PIT_MR_PITEN (1 << 24) /* Bit 24: Period Interval Timer Enable */
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#define PIT_MR_PITIEN (1 << 25) /* Bit 25: Periodic Interval Timer Interrupt Enable */
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/* Status Register */
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#define PIT_SR_S (1 << 0) /* Bit 0: Periodic Interval Timer Status */
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/* Periodic Interval Value Register */
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/* Periodic Interval Image Register */
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#define PIT_CPIV_SHIFT (0) /* Bits 0-19: Current Periodic Interval Value */
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#define PIT_CPIV_MASK (0x000fffff)
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#define PIT_PICNT_SHIFT (20) /* Bits 20-31: Periodic Interval Counter */
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#define PIT_PICNT_MASK (0xfff << PIT_PIVR_PICNT_SHIFT)
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#endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAM_PIT_H */
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