Stuart Ianna 34bfa2f7ba arch/risc-v/litex: Add platform specific tickless implementation. ... Adds a platform specific implementation for tickless schedular operation. This includes: - Tickless operation for vexriscv cores. - Tickless operation for vexriscv-smp cores. - Ticked operation for vexriscv-smp cores. Ticked operation for vexriscv core has been refactored. Additional default configuration added to demonstrate operation. Both tickless and ticked options use Litex timer0 for scheduling intervals. This is significantly faster than interfaceing with the risc-v mtimer through opensbi.		2023-08-16 16:59:27 +08:00
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arty_a7	arch/risc-v/litex: Add platform specific tickless implementation.	2023-08-16 16:59:27 +08:00