Huang Qi 36bc8d2131 arch/risc-v: Align prototype of riscv_exception with xcpt_t ... Thus we can attach it to irq handler without any cast. Signed-off-by: Huang Qi <huangqi3@xiaomi.com>		2022-04-10 00:52:04 +08:00
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include	esp32c3: Simplify irq dispatch logic	2022-04-07 18:16:35 +02:00
src	arch/risc-v: Align prototype of riscv_exception with xcpt_t	2022-04-10 00:52:04 +08:00
Kconfig	RISC-V: Implement skeleton for a per CPU structure	2022-04-01 16:19:42 -03:00