212ef18803
The PIC32MZ architecture provides a Peripheral Pin Select (PPS) which allows mapping peripherals to different GPIO pins. To map a peripheral output, a value is programmed to a register called RPnxR, where n is the GPIO port (A thru K) and x is the GPIO pin (0 thru 15). The names of these registers in code are PIC32MZ_RPnxR. However, in various definitions, these were mistakenly written as PI32MZ_RPnxR (missing C in PIC32). This prevents using any of the affected mappings. This issue is fixed by repairing the define names. * arch/mips/src/pic32mz/hardware/pic32mzec_pps.h, arch/mips/src/pic32mz/hardware/pic32mzef_pps.h: (): s/PI32MZ/PIC32MZ/g |
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