621 lines
20 KiB
C
621 lines
20 KiB
C
/****************************************************************************
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* drivers/sensors/ads1242.c
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* Character driver for the MCP3426 Differential Input 16 Bit Delta/Sigma ADC
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Copyright (C) 2015 DS-Automotion GmbH. All rights reserved.
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* Author: Alexander Entinger <a.entinger@ds-automotion.com>
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* Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdlib.h>
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#include <stdbool.h>
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#include <fixedmath.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/fs/fs.h>
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#include <nuttx/spi/spi.h>
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#include <nuttx/analog/ads1242.h>
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#if defined(CONFIG_SPI) && defined(CONFIG_ADC_ADS1242)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct ads1242_dev_s
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{
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FAR struct spi_dev_s *spi; /* Pointer to the SPI instance */
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uint32_t osc_period_us; /* Period of the oscillator attached to the ADS1242 in us */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* SPI Helpers */
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static void ads1242_lock(FAR struct spi_dev_s *spi);
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static void ads1242_unlock(FAR struct spi_dev_s *spi);
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static void ads1242_reset(FAR struct ads1242_dev_s *dev);
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static void ads1242_performSelfGainCalibration(
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FAR struct ads1242_dev_s *dev);
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static void ads1242_performSelfOffsetCalibration(
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FAR struct ads1242_dev_s *dev);
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static void ads1242_performSystemOffsetCalibration(
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FAR struct ads1242_dev_s *dev);
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static void ads1242_read_conversion_result(FAR struct ads1242_dev_s *dev,
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FAR uint32_t *conversion_result);
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static void ads1242_write_reg(FAR struct ads1242_dev_s *dev,
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uint8_t const reg_addr, uint8_t const reg_value);
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static void ads1242_read_reg(FAR struct ads1242_dev_s *dev,
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uint8_t const reg_addr, FAR uint8_t *reg_value);
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static void ads1242_set_gain(FAR struct ads1242_dev_s *dev,
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ADS1242_GAIN_SELECTION const gain_selection);
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static void ads1242_set_positive_input(FAR struct ads1242_dev_s *dev,
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ADS1242_POSITIVE_INPUT_SELECTION const pos_in_sel);
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static void ads1242_set_negative_input(FAR struct ads1242_dev_s *dev,
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ADS1242_NEGATIVE_INPUT_SELECTION const neg_in_sel);
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static bool ads1242_is_data_ready(FAR struct ads1242_dev_s *dev);
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#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
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static void ads1242_print_regs(FAR struct ads1242_dev_s *dev, char const *msg);
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#endif /* CONFIG_DEBUG && CONFIG_DEBUG_VERBOSE */
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/* Character driver methods */
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static int ads1242_open(FAR struct file *filep);
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static int ads1242_close(FAR struct file *filep);
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static ssize_t ads1242_read(FAR struct file *, FAR char *, size_t);
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static ssize_t ads1242_write(FAR struct file *filep, FAR const char *buffer,
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size_t buflen);
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static int ads1242_ioctl(FAR struct file *filep, int cmd,
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unsigned long arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct file_operations g_ads1242_fops =
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{
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ads1242_open,
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ads1242_close,
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ads1242_read,
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ads1242_write,
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NULL,
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ads1242_ioctl
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#ifndef CONFIG_DISABLE_POLL
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, NULL
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#endif
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: ads1242_lock
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*
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* Description:
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* Lock and configure the SPI bus.
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*
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****************************************************************************/
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static void ads1242_lock(FAR struct spi_dev_s *spi)
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{
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(void)SPI_LOCK(spi, true);
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SPI_SETMODE(spi, ADS1242_SPI_MODE);
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SPI_SETBITS(spi, 8);
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(void)SPI_HWFEATURES(spi, 0);
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SPI_SETFREQUENCY(spi, ADS1242_SPI_FREQUENCY);
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}
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/****************************************************************************
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* Name: ads1242_unlock
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*
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* Description:
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* Unlock the SPI bus.
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*
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****************************************************************************/
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static void ads1242_unlock(FAR struct spi_dev_s *spi)
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{
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(void)SPI_LOCK(spi, false);
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}
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/****************************************************************************
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* Name: ads1242_reset
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****************************************************************************/
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static void ads1242_reset(FAR struct ads1242_dev_s *dev)
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{
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ads1242_lock(dev->spi);
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SPI_SELECT(dev->spi, 0, true); /* Set nADC_SPI_CS to low which selects the ADS1242 */
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SPI_SEND(dev->spi, ADS1242_CMD_RESET);/* Issue reset command */
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SPI_SELECT(dev->spi, 0, false); /* Set nADC_SPI_CS to high which deselects the ADS1242 */
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up_mdelay(100); /* Wait a little so the device has time to perform a proper reset */
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ads1242_unlock(dev->spi);
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}
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/****************************************************************************
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* Name: ads1242_performSelfGainCalibration
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****************************************************************************/
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static void ads1242_performSelfGainCalibration(FAR struct ads1242_dev_s *dev)
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{
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ads1242_lock(dev->spi);
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SPI_SELECT(dev->spi, 0, true);
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SPI_SEND(dev->spi, ADS1242_CMD_SELF_GAIN_CALIB);
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SPI_SELECT(dev->spi, 0, false);
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ads1242_unlock(dev->spi);
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}
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/****************************************************************************
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* Name: ads1242_performSelfOffsetCalibration
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****************************************************************************/
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static void ads1242_performSelfOffsetCalibration(FAR struct ads1242_dev_s *dev)
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{
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ads1242_lock(dev->spi);
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SPI_SELECT(dev->spi, 0, true);
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SPI_SEND(dev->spi, ADS1242_CMD_SELF_OFFSET_CALIB);
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SPI_SELECT(dev->spi, 0, false);
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ads1242_unlock(dev->spi);
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}
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/****************************************************************************
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* Name: ads1242_performSystemOffsetCalibration
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****************************************************************************/
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static void
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ads1242_performSystemOffsetCalibration(FAR struct ads1242_dev_s *dev)
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{
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ads1242_lock(dev->spi);
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SPI_SELECT(dev->spi, 0, true);
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SPI_SEND(dev->spi, ADS1242_CMD_SYSTEM_OFFSET_CALIB);
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SPI_SELECT(dev->spi, 0, false);
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ads1242_unlock(dev->spi);
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}
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/****************************************************************************
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* Name: ads1242_read_conversion_result
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****************************************************************************/
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static void ads1242_read_conversion_result(FAR struct ads1242_dev_s *dev,
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FAR uint32_t *conversion_result)
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{
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ads1242_lock(dev->spi);
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SPI_SELECT(dev->spi, 0, true);
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SPI_SEND(dev->spi, ADS1242_CMD_READ_DATA);
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/* Delay between last SCLK edge for DIN and first SCLK edge for DOUT:
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* RDATA, RDATAC, RREG, WREG: Min 50 x tOSC Periods
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*/
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up_udelay(50 * dev->osc_period_us);
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*conversion_result = 0;
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/* 1st Byte = MSB
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* 2nd Byte = Mid-Byte
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* 3rd Byte = LSB
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*/
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*conversion_result |= ((uint32_t)(SPI_SEND(dev->spi, 0xFF))) << 16;
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*conversion_result |= ((uint32_t)(SPI_SEND(dev->spi, 0xFF))) << 8;
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*conversion_result |= ((uint32_t)(SPI_SEND(dev->spi, 0xFF))) << 0;
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SPI_SELECT(dev->spi, 0, false);
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ads1242_unlock(dev->spi);
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}
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/****************************************************************************
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* Name: ads1242_write_reg
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*
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* Description:
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* Write to the registers starting with the register address specified as
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* part of the instruction. The number of registers that will be written
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* is one plus the value of the second byte.
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*
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****************************************************************************/
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static void ads1242_write_reg(FAR struct ads1242_dev_s *dev,
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uint8_t const reg_addr, uint8_t const reg_value)
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{
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ads1242_lock(dev->spi);
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SPI_SELECT(dev->spi, 0, true);
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SPI_SEND(dev->spi, ADS1242_CMD_WRITE_REGISTER | reg_addr);
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SPI_SEND(dev->spi, 0x00); /* Write 1 Byte */
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SPI_SEND(dev->spi, reg_value);
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SPI_SELECT(dev->spi, 0, false);
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ads1242_unlock(dev->spi);
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}
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/****************************************************************************
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* Name: ads1242_read_reg
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*
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* Description:
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* Output the data from up to 16 registers starting with the register
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* address specified as part of the instruction. The number of registers
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* read will be one plus the second byte count. If the count exceeds the
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* remaining registers, the addresses wrap back to the beginning.
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*
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****************************************************************************/
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static void ads1242_read_reg(FAR struct ads1242_dev_s *dev,
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uint8_t const reg_addr, FAR uint8_t *reg_value)
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{
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ads1242_lock(dev->spi);
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SPI_SELECT(dev->spi, 0, true);
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SPI_SEND(dev->spi, ADS1242_CMD_READ_REGISTER | reg_addr);
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SPI_SEND(dev->spi, 0x00); /* Read 1 Byte */
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/* Delay between last SCLK edge for DIN and first SCLK edge for DOUT:
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* RDATA, RDATAC, RREG, WREG: Min 50 x tOSC Periods
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*/
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up_udelay(50 * dev->osc_period_us);
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*reg_value = SPI_SEND(dev->spi, 0xFF);
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SPI_SELECT(dev->spi, 0, false);
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ads1242_unlock(dev->spi);
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}
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/****************************************************************************
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* Name: ads1242_set_gain
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****************************************************************************/
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static void ads1242_set_gain(FAR struct ads1242_dev_s *dev,
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ADS1242_GAIN_SELECTION const gain_selection)
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{
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uint8_t setup_reg_value = 0;
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ads1242_read_reg(dev, ADS1242_REG_SETUP, &setup_reg_value);
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setup_reg_value &= ~(ADS1242_REG_SETUP_BIT_PGA2 |
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ADS1242_REG_SETUP_BIT_PGA1 |
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ADS1242_REG_SETUP_BIT_PGA0);
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setup_reg_value |= (uint8_t)(gain_selection);
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ads1242_write_reg(dev, ADS1242_REG_SETUP, setup_reg_value);
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#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
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ads1242_print_regs(dev, "ads1242_set_gain");
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#endif
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/* It is necessary to perform a offset calibration after setting the gain */
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ads1242_performSelfOffsetCalibration(dev);
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}
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/****************************************************************************
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* Name: ads1242_set_positive_input
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****************************************************************************/
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static void ads1242_set_positive_input(FAR struct ads1242_dev_s *dev,
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ADS1242_POSITIVE_INPUT_SELECTION const pos_in_sel)
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{
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uint8_t mux_reg_value = 0;
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ads1242_read_reg(dev, ADS1242_REG_MUX, &mux_reg_value);
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mux_reg_value &= ~(ADS1242_REG_MUX_BIT_PSEL3 | ADS1242_REG_MUX_BIT_PSEL2 |
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ADS1242_REG_MUX_BIT_PSEL1 | ADS1242_REG_MUX_BIT_PSEL0);
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mux_reg_value |= (uint8_t)(pos_in_sel);
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ads1242_write_reg(dev, ADS1242_REG_MUX, mux_reg_value);
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#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
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ads1242_print_regs(dev, "ads1242_set_positive_input");
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#endif
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}
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/****************************************************************************
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* Name: ads1242_set_negative_input
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****************************************************************************/
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static void ads1242_set_negative_input(FAR struct ads1242_dev_s *dev,
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ADS1242_NEGATIVE_INPUT_SELECTION const neg_in_sel)
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{
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uint8_t mux_reg_value = 0;
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ads1242_read_reg(dev, ADS1242_REG_MUX, &mux_reg_value);
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mux_reg_value &= ~(ADS1242_REG_MUX_BIT_NSEL3 | ADS1242_REG_MUX_BIT_NSEL2 |
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ADS1242_REG_MUX_BIT_NSEL1 | ADS1242_REG_MUX_BIT_NSEL0);
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mux_reg_value |= (uint8_t)(neg_in_sel);
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ads1242_write_reg(dev, ADS1242_REG_MUX, mux_reg_value);
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#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
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ads1242_print_regs(dev, "ads1242_set_negative_input");
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#endif
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}
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/****************************************************************************
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* Name: ads1242_set_negative_input
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****************************************************************************/
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static bool ads1242_is_data_ready(FAR struct ads1242_dev_s *dev)
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{
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uint8_t acr_reg_value = 0xFF;
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ads1242_read_reg(dev, ADS1242_REG_ACR, &acr_reg_value);
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return (acr_reg_value & ADS1242_REG_ACR_BIT_nDRDY) == 0;
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}
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/****************************************************************************
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* Name: ads1242_print_regs
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****************************************************************************/
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#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
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static void ads1242_print_regs(FAR struct ads1242_dev_s *dev, char const *msg)
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{
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uint8_t setup_reg_value = 0;
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uint8_t mux_reg_value = 0;
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uint8_t acr_reg_value = 0;
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dbg("%s\n", msg);
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ads1242_read_reg(dev, ADS1242_REG_SETUP, &setup_reg_value);
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ads1242_read_reg(dev, ADS1242_REG_MUX, &mux_reg_value);
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ads1242_read_reg(dev, ADS1242_REG_ACR, &acr_reg_value);
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dbg("SETUP %02X\n", setup_reg_value);
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dbg("MUX %02X\n", mux_reg_value);
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dbg("ACR %02X\n", acr_reg_value);
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}
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#endif /* CONFIG_DEBUG && CONFIG_DEBUG_VERBOSE */
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/****************************************************************************
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* Name: ads1242_open
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****************************************************************************/
|
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static int ads1242_open(FAR struct file *filep)
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{
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FAR struct inode *inode = filep->f_inode;
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FAR struct ads1242_dev_s *priv = inode->i_private;
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ads1242_reset(priv);
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up_mdelay(100);
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ads1242_performSelfGainCalibration(priv);
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up_mdelay(100);
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/* SPEED = 1 -> fMod = fOsc / 256 (fMod = Modulator Clock Speed)
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* BUFEN = 1 -> Internal input buffer enabled -> results in a very high
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* impedance input for the ADC ~ 5 GOhm
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*/
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ads1242_write_reg(priv, ADS1242_REG_ACR,
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ADS1242_REG_ACR_BIT_SPEED | ADS1242_REG_ACR_BIT_BUFEN);
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ads1242_performSelfOffsetCalibration(priv);
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up_mdelay(100);
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#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
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ads1242_print_regs(priv, "ads1242_open");
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#endif
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return OK;
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}
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/****************************************************************************
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* Name: ads1242_close
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|
****************************************************************************/
|
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|
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static int ads1242_close(FAR struct file *filep)
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{
|
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FAR struct inode *inode = filep->f_inode;
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FAR struct ads1242_dev_s *priv = inode->i_private;
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|
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ads1242_reset(priv);
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up_mdelay(100);
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return OK;
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}
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|
|
/****************************************************************************
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|
* Name: ads1242_read
|
|
****************************************************************************/
|
|
|
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static ssize_t ads1242_read(FAR struct file *filep,
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FAR char *buffer, size_t buflen)
|
|
{
|
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return -ENOSYS;
|
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}
|
|
|
|
/****************************************************************************
|
|
* Name: ads1242_write
|
|
****************************************************************************/
|
|
|
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static ssize_t ads1242_write(FAR struct file *filep,
|
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FAR const char *buffer, size_t buflen)
|
|
{
|
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return -ENOSYS;
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}
|
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|
|
/****************************************************************************
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|
* Name: ads1242_ioctl
|
|
****************************************************************************/
|
|
|
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static int ads1242_ioctl (FAR struct file *filep, int cmd, unsigned long arg)
|
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{
|
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FAR struct inode *inode = filep->f_inode;
|
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FAR struct ads1242_dev_s *priv = inode->i_private;
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|
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int ret = OK;
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|
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switch (cmd)
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{
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/* Read the result of an analog conversion */
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|
|
|
case ANIOC_ADS2142_READ:
|
|
{
|
|
FAR uint32_t *data = (FAR uint32_t *)((uintptr_t)arg);
|
|
ads1242_read_conversion_result(priv, data);
|
|
}
|
|
break;
|
|
|
|
/* Set the gain of the ADC */
|
|
|
|
case ANIOC_ADS2142_SET_GAIN:
|
|
{
|
|
ads1242_set_gain(priv, (ADS1242_GAIN_SELECTION)(arg));
|
|
}
|
|
break;
|
|
|
|
/* Set the positive input of the ADC */
|
|
|
|
case ANIOC_ADS2142_SET_POSITIVE_INPUT:
|
|
{
|
|
ads1242_set_positive_input(priv,
|
|
(ADS1242_POSITIVE_INPUT_SELECTION)(arg));
|
|
}
|
|
break;
|
|
|
|
/* Set the negative input of the ADC */
|
|
|
|
case ANIOC_ADS2142_SET_NEGATIVE_INPUT:
|
|
{
|
|
ads1242_set_negative_input(priv,
|
|
(ADS1242_NEGATIVE_INPUT_SELECTION)(arg));
|
|
}
|
|
break;
|
|
|
|
/* Check if data is ready to be read */
|
|
|
|
case ANIOC_ADS2142_IS_DATA_READY:
|
|
{
|
|
FAR bool *is_data_ready = (FAR bool *)((uintptr_t)arg);
|
|
*is_data_ready = ads1242_is_data_ready(priv);
|
|
}
|
|
break;
|
|
|
|
/* Perform a system offset calibration - Note: Zero input signal must
|
|
* be applied.
|
|
*/
|
|
|
|
case ANIOC_ADS2142_DO_SYSTEM_OFFSET_CALIB:
|
|
{
|
|
ads1242_performSystemOffsetCalibration(priv);
|
|
}
|
|
break;
|
|
|
|
/* Command was not recognized */
|
|
|
|
default:
|
|
dbg ("Unrecognized cmd: %d\n", cmd);
|
|
ret = -ENOTTY;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Public Functions
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Name: ads1242_register
|
|
*
|
|
* Description:
|
|
* Register the ADS1242 character device as 'devpath'
|
|
*
|
|
* Input Parameters:
|
|
* devpath - The full path to the driver to register. E.g., "/dev/ads1242"
|
|
* spi - An instance of the SPI interface to use to communicate with ADS1242
|
|
* osc_freq_hz - The frequency of the ADS1242 oscillator in Hz. Required for
|
|
* calculating the minimum delay periods when accessing the device via SPI.
|
|
*
|
|
* Returned Value:
|
|
* Zero (OK) on success; a negated errno value on failure.
|
|
*
|
|
****************************************************************************/
|
|
|
|
int ads1242_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
|
|
uint32_t const osc_freq_hz)
|
|
{
|
|
FAR struct ads1242_dev_s *priv;
|
|
int ret;
|
|
|
|
/* Sanity check */
|
|
|
|
DEBUGASSERT(spi != NULL);
|
|
|
|
/* Initialize the ADS1242 device structure */
|
|
|
|
priv = (FAR struct ads1242_dev_s *)kmm_malloc(sizeof(struct ads1242_dev_s));
|
|
if (priv == NULL)
|
|
{
|
|
dbg ("Failed to allocate instance\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
priv->spi = spi;
|
|
|
|
float const osc_period_us = (1000.0 * 1000.0) / ((float)(osc_freq_hz));
|
|
priv->osc_period_us = (uint32_t)(osc_period_us);
|
|
|
|
/* Register the character driver */
|
|
|
|
ret = register_driver(devpath, &g_ads1242_fops, 0666, priv);
|
|
if (ret < 0)
|
|
{
|
|
dbg ("Failed to register driver: %d\n", ret);
|
|
kmm_free(priv);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
#endif /* CONFIG_SPI && CONFIG_ADC_ADS1242 */
|