36df84c843
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5145 42af7a65-404d-4744-a932-0658087f49c3
218 lines
6.0 KiB
C
218 lines
6.0 KiB
C
/****************************************************************************
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* arch/avr/include/avr32/irq.h
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*
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* Copyright (C) 2010 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* This file should never be included directed but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_AVR_INCLUDE_AVR32_IRQ_H
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#define __ARCH_AVR_INCLUDE_AVR32_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/irq.h>
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#include <arch/avr32/avr32.h>
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/* General notes about the AVR32 ABI:
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*
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* Scratch/Volatile Registers: r8-r12
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* Preserved/Static Registers: r0-r7
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* Parameter Passing: r12-R8 (in that order)
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*/
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/* Register state save array indices.
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*
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* The following registers are saved by the AVR32 hardware (for the case of
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* interrupts only). Note the registers are order in the opposite order the
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* they appear in memory (i.e., in the order of increasing address) because
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* this makes it easier to following the ordering of pushing on a push-down
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* stack.
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*/
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#define REG_R8 16
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#define REG_R9 15
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#define REG_R10 14
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#define REG_R11 13
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#define REG_R12 12
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#define REG_R14 11
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#define REG_R15 10
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#define REG_SR 9
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#define REG_LR REG_R14
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#define REG_PC REG_R15
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/* Additional registers saved in order have the full CPU context */
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#define REG_R13 8
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#define REG_SP REG_R13
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#define REG_R0 7
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#define REG_R1 6
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#define REG_R2 5
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#define REG_R3 4
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#define REG_R4 3
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#define REG_R5 2
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#define REG_R6 1
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#define REG_R7 0
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/* Size of the register state save array (in 32-bit words) */
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#define INTCONTEXT_REGS 8 /* r8-r12, lr, pc, sr */
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#define XCPTCONTEXT_REGS 17 /* Plus r0-r7, sp */
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* This struct defines the way the registers are stored. */
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#ifndef __ASSEMBLY__
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struct xcptcontext
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{
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/* The following function pointer is non-zero if there are pending signals
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* to be processed.
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*/
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#ifndef CONFIG_DISABLE_SIGNALS
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void *sigdeliver; /* Actual type is sig_deliver_t */
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/* These are saved copies of PC and SR used during signal processing.*/
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uint32_t saved_pc;
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uint32_t saved_sr;
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#endif
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/* Register save area */
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uint32_t regs[XCPTCONTEXT_REGS];
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};
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#endif
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* Read the AVR32 status register */
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static inline uint32_t avr32_sr(void)
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{
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uint32_t sr;
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__asm__ __volatile__ (
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"mfsr\t%0,%1\n\t"
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: "=r" (sr)
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: "i" (AVR32_SR)
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);
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return sr;
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}
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/* Read the interrupt vector base address */
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static inline uint32_t avr32_evba(void)
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{
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uint32_t evba;
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__asm__ __volatile__ (
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"mfsr\t%0,%1\n\t"
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: "=r" (evba)
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: "i" (AVR32_EVBA)
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);
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return evba;
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}
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/* Save the current interrupt enable state & disable all interrupts */
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static inline irqstate_t irqsave(void)
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{
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irqstate_t sr = (irqstate_t)avr32_sr();
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__asm__ __volatile__ (
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"ssrf\t%0\n\t"
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"nop\n\t"
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"nop"
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:
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: "i" (AVR32_SR_GM_SHIFT)
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);
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return sr;
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}
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/* Restore saved interrupt state */
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static inline void irqrestore(irqstate_t flags)
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{
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if ((flags & AVR32_SR_GM_MASK) == 0)
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{
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__asm__ __volatile__ (
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"csrf\t%0\n\t"
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"nop\n\t"
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"nop"
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:
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: "i" (AVR32_SR_GM_SHIFT)
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);
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}
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}
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#endif /* __ASSEMBLY__ */
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/****************************************************************************
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* Public Variables
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_AVR_INCLUDE_AVR32_IRQ_H */
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