nuttx/boards/risc-v
Eero Nurkkala 3b330089d5 mpfs: ddr: add DDR training
This adds DDR training. The training has a small chance of failing,
and then the training is restarted.

DDR training cannot be done meaningfully while the software is
in DDR. If the system is intended to run from eNVM, like a
bootloader, the linker script should be tuned to utilize the envm
region as follows:

  envm (rx)   : ORIGIN = 0x20220100, LENGTH = 128K - 256
  l2lim (rwx) : ORIGIN = 0x08000000, LENGTH = 1024k

256 bytes are reserved for the system; The fixed block may be
installed from the 'hart-software-services' -repository:
https://github.com/polarfire-soc/hart-software-services.git

For example, the 256-byte image: hss-envm-wrapper-bm1-dummySbic.bin
may be prepended on the nuttx bootloader image in the following
manner:

 cat hss-envm-wrapper-bm1-dummySbic.bin > nuttx_bootloader.bin
 cat nuttx.bin >> nuttx_bootloader.bin
 riscv64-unknown-elf-objcopy -I binary -O ihex --change-section-lma
  *+0x20220000 nuttx_bootloader.bin flashable_image.hex

This provides an image 'flashable_image.hex' that may be flashed on
the eNVM region via Microsemi Libero tool.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
..
bl602/bl602evb Open ble controller adaptation code 2021-10-08 02:30:27 -07:00
c906/smartl-c906 Rename CONFIG_LIB_BOARDCTL to CONFIG_BOARDCTL 2021-08-06 13:58:26 +02:00
esp32c3/esp32c3-devkit boards/esp32&esp32c3: Remove crypto accelerators' defconfigs. 2021-10-19 18:41:57 -03:00
fe310/hifive1-revb Rename CONFIG_LIB_BOARDCTL to CONFIG_BOARDCTL 2021-08-06 13:58:26 +02:00
k210/maix-bit boards: k210: Add initial gpio user space support 2021-10-17 17:29:59 +09:00
litex/arty_a7 Rename CONFIG_LIB_BOARDCTL to CONFIG_BOARDCTL 2021-08-06 13:58:26 +02:00
mpfs/icicle mpfs: ddr: add DDR training 2021-10-21 22:40:26 -05:00
rv32m1/rv32m1-vega Rename CONFIG_LIB_BOARDCTL to CONFIG_BOARDCTL 2021-08-06 13:58:26 +02:00