Jukka Laitinen fc41bb7f8a boards/m100pfsevp: Decrease DDR lane temination values to 40 ohm and increase BCLKSCLK_OFFSET ... This fixes problems with DDR training sequence on aries m100pfs board - Set LIBERO_SETTING_RPC_ODT_* to 6, which matches 40 ohm. Originally it was 120 ohm (2) - Set BCLKSCLK_OFFSET value to 5, which matches icicle board setting Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>		2021-12-29 09:36:49 -06:00
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board_liberodefs.h	boards/m100pfsevp: Decrease DDR lane temination values to 40 ohm and increase BCLKSCLK_OFFSET	2021-12-29 09:36:49 -06:00
board.h	risc-v/mpfs: Add support for Aries M100PFSMVP board	2021-11-18 10:59:44 -03:00