282 lines
6.1 KiB
ArmAsm
282 lines
6.1 KiB
ArmAsm
/****************************************************************************
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* libs/libc/machine/xtensa/arch_memcpy.S
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include "xtensa_asm.h"
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#include <arch/chip/core-isa.h>
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#include <arch/xtensa/xtensa_abi.h>
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/****************************************************************************
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* Pre-processor Macros
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****************************************************************************/
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/* set to 1 when running on ISS (simulator) with the
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lint or ferret client, or 0 to save a few cycles */
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#define SIM_CHECKS_ALIGNMENT 0
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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.section .text
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.begin schedule
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.literal_position
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.local .Ldst1mod2
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.local .Ldst2mod4
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.local .Lbytecopy
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.align 4
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.global memcpy
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.type memcpy, @function
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memcpy:
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ENTRY(16)
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/* a2 = dst, a3 = src, a4 = len */
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mov a5, a2 # copy dst so that a2 is return value
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bbsi.l a2, 0, .Ldst1mod2
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bbsi.l a2, 1, .Ldst2mod4
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.Ldstaligned:
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/* Get number of loop iterations with 16B per iteration. */
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srli a7, a4, 4
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/* Check if source is aligned. */
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slli a8, a3, 30
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bnez a8, .Lsrcunaligned
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/* Destination and source are word-aligned, use word copy. */
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#if XCHAL_HAVE_LOOPS
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loopnez a7, 2f
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#else
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beqz a7, 2f
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slli a8, a7, 4
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add a8, a8, a3 # a8 = end of last 16B source chunk
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#endif
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1: l32i a6, a3, 0
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l32i a7, a3, 4
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s32i a6, a5, 0
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l32i a6, a3, 8
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s32i a7, a5, 4
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l32i a7, a3, 12
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s32i a6, a5, 8
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addi a3, a3, 16
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s32i a7, a5, 12
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addi a5, a5, 16
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#if !XCHAL_HAVE_LOOPS
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bltu a3, a8, 1b
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#endif
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/* Copy any leftover pieces smaller than 16B. */
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2: bbci.l a4, 3, 3f
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/* Copy 8 bytes. */
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l32i a6, a3, 0
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l32i a7, a3, 4
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addi a3, a3, 8
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s32i a6, a5, 0
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s32i a7, a5, 4
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addi a5, a5, 8
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3: bbsi.l a4, 2, 4f
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bbsi.l a4, 1, 5f
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bbsi.l a4, 0, 6f
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RET(16)
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# .align 4
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/* Copy 4 bytes. */
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4: l32i a6, a3, 0
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addi a3, a3, 4
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s32i a6, a5, 0
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addi a5, a5, 4
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bbsi.l a4, 1, 5f
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bbsi.l a4, 0, 6f
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RET(16)
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/* Copy 2 bytes. */
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5: l16ui a6, a3, 0
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addi a3, a3, 2
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s16i a6, a5, 0
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addi a5, a5, 2
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bbsi.l a4, 0, 6f
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RET(16)
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/* Copy 1 byte. */
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6: l8ui a6, a3, 0
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s8i a6, a5, 0
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.Ldone:
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RET(16)
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/* Destination is aligned; source is unaligned. */
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# .align 4
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.Lsrcunaligned:
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/* Avoid loading anything for zero-length copies. */
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beqz a4, .Ldone
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/* Copy 16 bytes per iteration for word-aligned dst and
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unaligned src. */
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ssa8 a3 # set shift amount from byte offset
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#if XCHAL_UNALIGNED_LOAD_EXCEPTION || SIM_CHECKS_ALIGNMENT
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srli a11, a8, 30 # save unalignment offset for below
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sub a3, a3, a11 # align a3
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#endif
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l32i a6, a3, 0 # load first word
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#if XCHAL_HAVE_LOOPS
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loopnez a7, 2f
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#else
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beqz a7, 2f
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slli a10, a7, 4
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add a10, a10, a3 # a10 = end of last 16B source chunk
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#endif
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1: l32i a7, a3, 4
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l32i a8, a3, 8
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src_b a6, a6, a7
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s32i a6, a5, 0
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l32i a9, a3, 12
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src_b a7, a7, a8
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s32i a7, a5, 4
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l32i a6, a3, 16
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src_b a8, a8, a9
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s32i a8, a5, 8
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addi a3, a3, 16
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src_b a9, a9, a6
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s32i a9, a5, 12
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addi a5, a5, 16
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#if !XCHAL_HAVE_LOOPS
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bltu a3, a10, 1b
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#endif
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2: bbci.l a4, 3, 3f
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/* Copy 8 bytes. */
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l32i a7, a3, 4
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l32i a8, a3, 8
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src_b a6, a6, a7
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s32i a6, a5, 0
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addi a3, a3, 8
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src_b a7, a7, a8
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s32i a7, a5, 4
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addi a5, a5, 8
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mov a6, a8
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3: bbci.l a4, 2, 4f
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/* Copy 4 bytes. */
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l32i a7, a3, 4
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addi a3, a3, 4
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src_b a6, a6, a7
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s32i a6, a5, 0
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addi a5, a5, 4
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mov a6, a7
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4:
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#if XCHAL_UNALIGNED_LOAD_EXCEPTION || SIM_CHECKS_ALIGNMENT
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add a3, a3, a11 # readjust a3 with correct misalignment
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#endif
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bbsi.l a4, 1, 5f
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bbsi.l a4, 0, 6f
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RET(16)
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/* Copy 2 bytes. */
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5: l8ui a6, a3, 0
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l8ui a7, a3, 1
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addi a3, a3, 2
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s8i a6, a5, 0
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s8i a7, a5, 1
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addi a5, a5, 2
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bbsi.l a4, 0, 6f
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RET(16)
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/* Copy 1 byte. */
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6: l8ui a6, a3, 0
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s8i a6, a5, 0
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RET(16)
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# .align XCHAL_INST_FETCH_WIDTH
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__memcpy_aux:
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/* Skip bytes to get proper alignment for three-byte loop */
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# .skip XCHAL_INST_FETCH_WIDTH - 3
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.Lbytecopy:
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#if XCHAL_HAVE_LOOPS
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loopnez a4, 2f
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#else
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beqz a4, 2f
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add a7, a3, a4 # a7 = end address for source
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#endif
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1: l8ui a6, a3, 0
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addi a3, a3, 1
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s8i a6, a5, 0
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addi a5, a5, 1
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#if !XCHAL_HAVE_LOOPS
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bltu a3, a7, 1b
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#endif
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2: RET(16)
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/* Destination is unaligned. */
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# .align 4
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.Ldst1mod2: # dst is only byte aligned
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/* Do short copies byte-by-byte. */
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bltui a4, 7, .Lbytecopy
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/* Copy 1 byte. */
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l8ui a6, a3, 0
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addi a3, a3, 1
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addi a4, a4, -1
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s8i a6, a5, 0
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addi a5, a5, 1
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/* Return to main algorithm if dst is now aligned. */
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bbci.l a5, 1, .Ldstaligned
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.Ldst2mod4: # dst has 16-bit alignment
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/* Do short copies byte-by-byte. */
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bltui a4, 6, .Lbytecopy
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/* Copy 2 bytes. */
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l8ui a6, a3, 0
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l8ui a7, a3, 1
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addi a3, a3, 2
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addi a4, a4, -2
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s8i a6, a5, 0
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s8i a7, a5, 1
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addi a5, a5, 2
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/* dst is now aligned; return to main algorithm. */
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j .Ldstaligned
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.end schedule
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.size memcpy, . - memcpy
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