f63ccb3ad3
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4879 42af7a65-404d-4744-a932-0658087f49c3
136 lines
3.9 KiB
Plaintext
136 lines
3.9 KiB
Plaintext
############################################################################
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# arch/arm/src/stm32/Make.defs
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#
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# Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name NuttX nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
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HEAD_ASRC =
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else
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HEAD_ASRC = stm32_vectors.S
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endif
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CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
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CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c \
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up_createstack.c up_mdelay.c up_udelay.c up_exit.c \
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up_initialize.c up_initialstate.c up_interruptcontext.c \
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up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
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up_releasepending.c up_releasestack.c up_reprioritizertr.c \
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up_schedulesigaction.c up_sigdeliver.c up_unblocktask.c \
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up_usestack.c up_doirq.c up_hardfault.c up_svcall.c
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ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
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CMN_ASRCS += up_exception.S
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CMN_CSRCS += up_vectors.c
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endif
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ifeq ($(CONFIG_DEBUG_STACK),y)
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CMN_CSRCS += up_checkstack.c
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endif
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_ASRCS += up_fpu.S
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endif
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CHIP_ASRCS =
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CHIP_CSRCS = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c \
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stm32_lsi.c stm32_gpio.c stm32_exti.c stm32_flash.c stm32_irq.c \
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stm32_timerisr.c stm32_dma.c stm32_lowputc.c stm32_serial.c \
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stm32_spi.c stm32_sdio.c stm32_tim.c stm32_i2c.c stm32_waste.c
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ifeq ($(CONFIG_USBDEV),y)
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ifeq ($(CONFIG_STM32_USB),y)
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CMN_CSRCS += stm32_usbdev.c
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endif
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ifeq ($(CONFIG_STM32_OTGFS),y)
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CMN_CSRCS += stm32_otgfsdev.c
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endif
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endif
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ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
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CHIP_ASRCS += stm32_vectors.S
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endif
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ifneq ($(CONFIG_IDLE_CUSTOM),y)
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CHIP_CSRCS += stm32_idle.c
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endif
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CHIP_CSRCS += stm32_pmstop.c stm32_pmstandby.c
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ifneq ($(CONFIG_PM_CUSTOMINIT),y)
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CHIP_CSRCS += stm32_pminitialize.c
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endif
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ifeq ($(CONFIG_STM32_ETHMAC),y)
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CHIP_CSRCS += stm32_eth.c
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endif
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ifeq ($(CONFIG_STM32_PWR),y)
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CHIP_CSRCS += stm32_pwr.c
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endif
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ifeq ($(CONFIG_RTC),y)
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CHIP_CSRCS += stm32_rtc.c
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endif
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ifeq ($(CONFIG_ADC),y)
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CHIP_CSRCS += stm32_adc.c
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endif
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ifeq ($(CONFIG_DAC),y)
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CHIP_CSRCS += stm32_dac.c
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endif
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ifeq ($(CONFIG_PWM),y)
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CHIP_CSRCS += stm32_pwm.c
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endif
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ifeq ($(CONFIG_QENCODER),y)
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CHIP_CSRCS += stm32_qencoder.c
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endif
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ifeq ($(CONFIG_CAN),y)
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CHIP_CSRCS += stm32_can.c
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endif
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ifeq ($(CONFIG_STM32_IWDG),y)
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CHIP_CSRCS += stm32_iwdg.c
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endif
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ifeq ($(CONFIG_STM32_WWDG),y)
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CHIP_CSRCS += stm32_wwdg.c
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endif
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ifeq ($(CONFIG_DEBUG),y)
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CHIP_CSRCS += stm32_dumpgpio.c
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endif
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