3ea545e7f3
Fix nxstyle errors to pass CI Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
72 lines
2.4 KiB
C
72 lines
2.4 KiB
C
/****************************************************************************
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* arch/arm/src/armv7-a/arm_cpuindex.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <nuttx/arch.h>
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#include "cp15.h"
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#include "sctlr.h"
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#ifdef CONFIG_SMP
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_cpu_index
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*
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* Description:
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* Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
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* corresponds to the currently executing CPU.
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*
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* If TLS is enabled, then the RTOS can get this information from the TLS
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* info structure. Otherwise, the MCU-specific logic must provide some
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* mechanism to provide the CPU index.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
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* corresponds to the currently executing CPU.
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*
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****************************************************************************/
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int up_cpu_index(void)
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{
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/* Read the Multiprocessor Affinity Register (MPIDR) */
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uint32_t mpidr = cp15_rdmpidr();
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/* And return the CPU ID field */
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return (mpidr & MPIDR_CPUID_MASK) >> MPIDR_CPUID_SHIFT;
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}
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#endif /* CONFIG_SMP */
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