yinshengkai 1d8e69700f drivers/serial: add ram uart driver ... It uses the memory block as the serial communication medium, which can communicate between different processes or different CPUs Using the following configuration, the cross-core communication rate of 200MHz cortex-M55 is about 461KB/s RAM_UART_BUFSIZE=1024 RAM_UART_POLLING_INTERVAL=100 Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>		2023-09-19 09:41:07 +08:00
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CMakeLists.txt	cmake:fix drivers build block during cmake reforming	2023-08-16 22:38:52 +08:00
Kconfig	drivers/serial: add ram uart driver	2023-09-19 09:41:07 +08:00
Kconfig-16550	serial/uart_16550: Wait before setting Line Control Register (Synopsys DesignWare 8250)	2023-08-03 08:38:07 +02:00
Kconfig-lpuart
Kconfig-pl011	arch/arm64: merge serial_pl011.c and qemu_serial.c	2023-05-10 09:06:59 +02:00
Kconfig-sci
Kconfig-uart
Kconfig-usart
Make.defs	drivers/serial: add ram uart driver	2023-09-19 09:41:07 +08:00
ptmx.c	drivers/ptmx: Fix a potential buffer overflow	2023-06-09 19:41:11 +03:00
pty.c	fs/inode: remove all unnecessary check for filep/inode	2023-08-29 09:47:11 +08:00
pty.h
serial_dma.c	drivers/serial: unmodify head and tail pointers	2023-09-19 09:41:07 +08:00
serial_io.c	tty:support tty c_cc VMIN & VTIME	2023-04-29 13:48:52 +08:00
serial_pl011.c	arch/arm64: merge serial_pl011.c and qemu_serial.c	2023-05-10 09:06:59 +02:00
serial.c	driver/serial: fix error echo about VT100 escape sequence	2023-08-30 14:26:11 +08:00
uart_16550.c	serial/uart_16550: Wait before setting Line Control Register (Synopsys DesignWare 8250)	2023-08-03 08:38:07 +02:00
uart_bth4.c
uart_bth5.c	mm/alloc: remove all unnecessary cast for alloc	2023-08-30 14:34:20 +08:00
uart_ram.c	drivers/serial: add ram uart driver	2023-09-19 09:41:07 +08:00
uart_rpmsg.c	driver/serial: fix race condition about calling rxflowcontrol in mutli thread	2023-08-30 14:33:00 +08:00