David Sidrane 41e3d9f174 Kinetis:Refactor you use SIM_SOPT2_PLLFLLSEL, added warning ... The warning has been added because: SIM_SOPT2_PLLFLLSEL is a clock selection that may feed many clock subsystem: USB, TPM, SDHCSRC, LPUARTSRC. Therefore, there needs to be a global board level setting to select the source for SIM_SOPT2_PLLFLLSEL and then derive all the sub selections and proper fractions/divisors for each modules clock.		2017-02-22 10:42:52 -10:00
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include	Kinetis:Include the PMC features	2017-02-22 10:42:52 -10:00
src	Kinetis:Refactor you use SIM_SOPT2_PLLFLLSEL, added warning	2017-02-22 10:42:52 -10:00
Kconfig	Merged in david_s5/nuttx/upstream_2_greg_f7_config (pull request #199)	2017-01-23 23:08:50 +00:00