371 lines
15 KiB
C
371 lines
15 KiB
C
/****************************************************************************
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* arch/arm/src/imxrt/imxrt_gpio.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_IMXRT_IMXRT_GPIO_H
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#define __ARCH_ARM_SRC_IMXRT_IMXRT_GPIO_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "chip.h"
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#include "hardware/imxrt_gpio.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* 32-bit Encoding:
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*
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* 3322 2222 2222 1111 1111 1100 0000 0000
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* 1098 7654 3210 9876 5432 1098 7654 3210
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* ENCODING IIXX XXXX XXXX XXXX MMMM MMMM MMMM MMMM
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* GPIO INPUT 00.. BEEG GGGP PPPP MMMM MMMM MMMM MMMM
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* INT INPUT 11.. BEEG GGGP PPPP MMMM MMMM MMMM MMMM
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* GPIO OUTPUT 01V. ..SG GGGP PPPP MMMM MMMM MMMM MMMM
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* PERIPHERAL 10AA AAS. IIII IIII MMMM MMMM MMMM MMMM
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*/
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/* Input/Output Selection:
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*
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* 3322 2222 2222 1111 1111 1100 0000 0000
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* 1098 7654 3210 9876 5432 1098 7654 3210
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* ENCODING II.. .... .... .... .... .... .... ....
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*/
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#define GPIO_MODE_SHIFT (30) /* Bits 30-31: Pin mode */
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#define GPIO_MODE_MASK (3 << GPIO_MODE_SHIFT)
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# define GPIO_INPUT (0 << GPIO_MODE_SHIFT) /* GPIO input */
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# define GPIO_OUTPUT (1 << GPIO_MODE_SHIFT) /* GPIO output */
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# define GPIO_PERIPH (2 << GPIO_MODE_SHIFT) /* Peripheral */
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# define GPIO_INTERRUPT (3 << GPIO_MODE_SHIFT) /* Interrupt input */
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/* Initial Output Value:
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*
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* GPIO OUTPUT 01V. .... .... .... .... .... .... ....
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*/
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#define GPIO_OUTPUT_ZERO (0) /* Bit 29: 0=Initial output is low */
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#define GPIO_OUTPUT_ONE (1 << 29) /* Bit 29: 1=Initial output is high */
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/* GPIO Port Number
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*
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* 3322 2222 2222 1111 1111 1100 0000 0000
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* 1098 7654 3210 9876 5432 1098 7654 3210
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* GPIO INPUT 00.. ...G GGG. .... .... .... .... ....
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* GPIO OUTPUT 01.. ...G GGG. .... .... .... .... ....
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*/
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#define GPIO_PORT_SHIFT (21) /* Bits 21-23: GPIO port index */
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#define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT)
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# define GPIO_PORT1 (GPIO1 << GPIO_PORT_SHIFT) /* GPIO1 */
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# define GPIO_PORT2 (GPIO2 << GPIO_PORT_SHIFT) /* GPIO2 */
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# define GPIO_PORT3 (GPIO3 << GPIO_PORT_SHIFT) /* GPIO3 */
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# define GPIO_PORT4 (GPIO4 << GPIO_PORT_SHIFT) /* GPIO4 */
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# define GPIO_PORT5 (GPIO5 << GPIO_PORT_SHIFT) /* GPIO5 */
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#if IMXRT_GPIO_NPORTS > 5
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# define GPIO_PORT6 (GPIO6 << GPIO_PORT_SHIFT) /* GPIO6 */
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# define GPIO_PORT7 (GPIO7 << GPIO_PORT_SHIFT) /* GPIO7 */
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# define GPIO_PORT8 (GPIO8 << GPIO_PORT_SHIFT) /* GPIO8 */
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# define GPIO_PORT9 (GPIO9 << GPIO_PORT_SHIFT) /* GPIO9 */
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#endif
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/* GPIO Pin Number:
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*
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* 3322 2222 2222 1111 1111 1100 0000 0000
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* 1098 7654 3210 9876 5432 1098 7654 3210
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* GPIO INPUT 00.. .... ...P PPPP .... .... .... ....
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* GPIO OUTPUT 01.. .... ...P PPPP .... .... .... ....
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*/
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#define GPIO_PIN_SHIFT (16) /* Bits 16-20: GPIO pin number */
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#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
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# define GPIO_PIN0 (0 << GPIO_PIN_SHIFT) /* Pin 0 */
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# define GPIO_PIN1 (1 << GPIO_PIN_SHIFT) /* Pin 1 */
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# define GPIO_PIN2 (2 << GPIO_PIN_SHIFT) /* Pin 2 */
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# define GPIO_PIN3 (3 << GPIO_PIN_SHIFT) /* Pin 3 */
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# define GPIO_PIN4 (4 << GPIO_PIN_SHIFT) /* Pin 4 */
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# define GPIO_PIN5 (5 << GPIO_PIN_SHIFT) /* Pin 5 */
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# define GPIO_PIN6 (6 << GPIO_PIN_SHIFT) /* Pin 6 */
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# define GPIO_PIN7 (7 << GPIO_PIN_SHIFT) /* Pin 7 */
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# define GPIO_PIN8 (8 << GPIO_PIN_SHIFT) /* Pin 8 */
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# define GPIO_PIN9 (9 << GPIO_PIN_SHIFT) /* Pin 9 */
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# define GPIO_PIN10 (10 << GPIO_PIN_SHIFT) /* Pin 10 */
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# define GPIO_PIN11 (11 << GPIO_PIN_SHIFT) /* Pin 11 */
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# define GPIO_PIN12 (12 << GPIO_PIN_SHIFT) /* Pin 12 */
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# define GPIO_PIN13 (13 << GPIO_PIN_SHIFT) /* Pin 13 */
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# define GPIO_PIN14 (14 << GPIO_PIN_SHIFT) /* Pin 14 */
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# define GPIO_PIN15 (15 << GPIO_PIN_SHIFT) /* Pin 15 */
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# define GPIO_PIN16 (16 << GPIO_PIN_SHIFT) /* Pin 16 */
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# define GPIO_PIN17 (17 << GPIO_PIN_SHIFT) /* Pin 17 */
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# define GPIO_PIN18 (18 << GPIO_PIN_SHIFT) /* Pin 18 */
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# define GPIO_PIN19 (19 << GPIO_PIN_SHIFT) /* Pin 19 */
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# define GPIO_PIN20 (20 << GPIO_PIN_SHIFT) /* Pin 20 */
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# define GPIO_PIN21 (21 << GPIO_PIN_SHIFT) /* Pin 21 */
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# define GPIO_PIN22 (22 << GPIO_PIN_SHIFT) /* Pin 22 */
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# define GPIO_PIN23 (23 << GPIO_PIN_SHIFT) /* Pin 23 */
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# define GPIO_PIN24 (24 << GPIO_PIN_SHIFT) /* Pin 24 */
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# define GPIO_PIN25 (25 << GPIO_PIN_SHIFT) /* Pin 25 */
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# define GPIO_PIN26 (26 << GPIO_PIN_SHIFT) /* Pin 26 */
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# define GPIO_PIN27 (27 << GPIO_PIN_SHIFT) /* Pin 27 */
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# define GPIO_PIN28 (28 << GPIO_PIN_SHIFT) /* Pin 28 */
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# define GPIO_PIN29 (29 << GPIO_PIN_SHIFT) /* Pin 29 */
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# define GPIO_PIN30 (30 << GPIO_PIN_SHIFT) /* Pin 30 */
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# define GPIO_PIN31 (31 << GPIO_PIN_SHIFT) /* Pin 31 */
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/* Peripheral Alternate Function:
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*
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* 3322 2222 2222 1111 1111 1100 0000 0000
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* 1098 7654 3210 9876 5432 1098 7654 3210
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* PERIPHERAL ..AA AA.. .... .... .... .... .... ....
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*/
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#define GPIO_ALT_SHIFT (26) /* Bits 26-29: Peripheral alternate function */
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#define GPIO_ALT_MASK (0xf << GPIO_ALT_SHIFT)
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# define GPIO_ALT0 (0 << GPIO_ALT_SHIFT) /* Alternate function 0 */
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# define GPIO_ALT1 (1 << GPIO_ALT_SHIFT) /* Alternate function 1 */
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# define GPIO_ALT2 (2 << GPIO_ALT_SHIFT) /* Alternate function 2 */
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# define GPIO_ALT3 (3 << GPIO_ALT_SHIFT) /* Alternate function 3 */
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# define GPIO_ALT4 (4 << GPIO_ALT_SHIFT) /* Alternate function 4 */
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# define GPIO_ALT5 (5 << GPIO_ALT_SHIFT) /* Alternate function 5 is GPIO */
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# define GPIO_ALT6 (6 << GPIO_ALT_SHIFT) /* Alternate function 6 */
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# define GPIO_ALT7 (7 << GPIO_ALT_SHIFT) /* Alternate function 7 */
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# define GPIO_ALT8 (8 << GPIO_ALT_SHIFT) /* Alternate function 8 */
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# define GPIO_ALT9 (9 << GPIO_ALT_SHIFT) /* Alternate function 9 */
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/* Peripheral Software Input On Field:
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*
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* 3322 2222 2222 1111 1111 1100 0000 0000
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* 1098 7654 3210 9876 5432 1098 7654 3210
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* PERIPHERAL .... ..S. .... .... .... .... .... ....
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*/
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#define GPIO_SION_SHIFT (25) /* Bits 25: Peripheral SION function */
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#define GPIO_SION_MASK (1 << GPIO_SION_SHIFT)
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# define GPIO_SION_ENABLE (1 << GPIO_SION_SHIFT) /* enable SION */
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/* Interrupt edge/level configuration
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*
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* 3322 2222 2222 1111 1111 1100 0000 0000
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* 1098 7654 3210 9876 5432 1098 7654 3210
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* INT INPUT 11.. .EE. .... .... .... .... .... ....
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*/
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#define GPIO_INTCFG_SHIFT (25) /* Bits 25-26: Interrupt edge/level configuration */
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#define GPIO_INTCFG_MASK (3 << GPIO_INTCFG_SHIFT)
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# define GPIO_INT_LOWLEVEL (GPIO_ICR_LOWLEVEL << GPIO_INTCFG_SHIFT)
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# define GPIO_INT_HIGHLEVEL (GPIO_ICR_HIGHLEVEL << GPIO_INTCFG_SHIFT)
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# define GPIO_INT_RISINGEDGE (GPIO_ICR_RISINGEDGE << GPIO_INTCFG_SHIFT)
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# define GPIO_INT_FALLINGEDGE (GPIO_ICR_FALLINGEDGE << GPIO_INTCFG_SHIFT)
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/* Interrupt on both edges configuration
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*
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* 3322 2222 2222 1111 1111 1100 0000 0000
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* 1098 7654 3210 9876 5432 1098 7654 3210
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* INT INPUT 11.. B... .... .... .... .... .... ....
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*/
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#define GPIO_INTBOTHCFG_SHIFT (27) /* Bit 27: Interrupt both edges configuration */
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#define GPIO_INTBOTHCFG_MASK (1 << GPIO_INTBOTHCFG_SHIFT)
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# define GPIO_INTBOTH_EDGES (1 << GPIO_INTBOTHCFG_SHIFT)
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/* Pad Mux Register Index:
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*
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* 3322 2222 2222 1111 1111 1100 0000 0000
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* 1098 7654 3210 9876 5432 1098 7654 3210
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* PERIPHERAL .... .... IIII IIII .... .... .... ....
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*/
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#define GPIO_PADMUX_SHIFT (16) /* Bits 16-23: Peripheral alternate function */
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#define GPIO_PADMUX_MASK (0xff << GPIO_PADMUX_SHIFT)
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# define GPIO_PADMUX(n) ((uint32_t)(n) << GPIO_PADMUX_SHIFT)
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#define GPIO_PADMUX_GET(n) ((n&GPIO_PADMUX_MASK)>>GPIO_PADMUX_SHIFT)
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/* IOMUX Pin Configuration:
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*
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* 3322 2222 2222 1111 1111 1100 0000 0000
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* 1098 7654 3210 9876 5432 1098 7654 3210
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* ENCODING .... .... .... .... MMMM MMMM MMMM MMMM
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*
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* See imxrt_iomuxc.h for detailed content.
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*/
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#define GPIO_IOMUX_SHIFT (0) /* Bits 0-15: IOMUX pin configuration */
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#define GPIO_IOMUX_MASK (0xffff << GPIO_IOMUX_SHIFT)
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/* Helper addressing macros */
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#define IMXRT_GPIO_BASE(n) g_gpio_base[n] /* Use GPIO1..GPIOn macros as indices */
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#define IMXRT_GPIO_DR(n) (IMXRT_GPIO_BASE(n) + IMXRT_GPIO_DR_OFFSET)
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#define IMXRT_GPIO_GDIR(n) (IMXRT_GPIO_BASE(n) + IMXRT_GPIO_GDIR_OFFSET)
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#define IMXRT_GPIO_PSR(n) (IMXRT_GPIO_BASE(n) + IMXRT_GPIO_PSR_OFFSET)
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#define IMXRT_GPIO_ICR1(n) (IMXRT_GPIO_BASE(n) + IMXRT_GPIO_ICR1_OFFSET)
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#define IMXRT_GPIO_ICR2(n) (IMXRT_GPIO_BASE(n) + IMXRT_GPIO_ICR2_OFFSET)
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#define IMXRT_GPIO_IMR(n) (IMXRT_GPIO_BASE(n) + IMXRT_GPIO_IMR_OFFSET)
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#define IMXRT_GPIO_ISR(n) (IMXRT_GPIO_BASE(n) + IMXRT_GPIO_ISR_OFFSET)
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#define IMXRT_GPIO_EDGE(n) (IMXRT_GPIO_BASE(n) + IMXRT_GPIO_EDGE_OFFSET)
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#define IMXRT_GPIO_SET(n) (IMXRT_GPIO_BASE(n) + IMXRT_GPIO_SET_OFFSET)
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#define IMXRT_GPIO_CLEAR(n) (IMXRT_GPIO_BASE(n) + IMXRT_GPIO_CLEAR_OFFSET)
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#define IMXRT_GPIO_TOGGLE(n) (IMXRT_GPIO_BASE(n) + IMXRT_GPIO_TOGGLE_OFFSET)
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* The smallest integer type that can hold the GPIO encoding */
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typedef uint32_t gpio_pinset_t;
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/* Look-up table that maps GPIO1..GPIOn indexes into GPIO register base
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* addresses
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*/
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EXTERN const uintptr_t g_gpio_base[IMXRT_GPIO_NPORTS];
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: imxrt_gpioirq_initialize
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*
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* Description:
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* Initialize logic to support a second level of interrupt decoding for
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* GPIO pins.
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*
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****************************************************************************/
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#ifdef CONFIG_IMXRT_GPIO_IRQ
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void imxrt_gpioirq_initialize(void);
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#else
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# define imxrt_gpioirq_initialize()
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#endif
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/****************************************************************************
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* Name: imxrt_config_gpio
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*
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* Description:
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* Configure a GPIO pin based on bit-encoded description of the pin.
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*
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****************************************************************************/
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int imxrt_config_gpio(gpio_pinset_t pinset);
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/****************************************************************************
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* Name: imxrt_gpio_write
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*
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* Description:
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* Write one or zero to the selected GPIO pin
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*
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****************************************************************************/
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void imxrt_gpio_write(gpio_pinset_t pinset, bool value);
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/****************************************************************************
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* Name: imxrt_gpio_read
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*
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* Description:
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* Read one or zero from the selected GPIO pin
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*
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****************************************************************************/
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bool imxrt_gpio_read(gpio_pinset_t pinset);
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/****************************************************************************
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* Name: imxrt_gpioirq_configure
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*
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* Description:
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* Configure an interrupt for the specified GPIO pin.
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*
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****************************************************************************/
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#ifdef CONFIG_IMXRT_GPIO_IRQ
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int imxrt_gpioirq_configure(gpio_pinset_t pinset);
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#else
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# define imxrt_gpioirq_configure(pinset)
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#endif
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/****************************************************************************
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* Name: imxrt_gpioirq_enable
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*
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* Description:
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* Enable the interrupt for specified GPIO IRQ
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*
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****************************************************************************/
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#ifdef CONFIG_IMXRT_GPIO_IRQ
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int imxrt_gpioirq_enable(int irq);
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#else
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# define imxrt_gpioirq_enable(irq)
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#endif
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/****************************************************************************
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* Name: imxrt_gpioirq_disable
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*
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* Description:
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* Disable the interrupt for specified GPIO IRQ
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*
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****************************************************************************/
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#ifdef CONFIG_IMXRT_GPIO_IRQ
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int imxrt_gpioirq_disable(int irq);
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#else
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# define imxrt_gpioirq_disable(irq)
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#endif
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/****************************************************************************
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* Function: imxrt_dump_gpio
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*
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* Description:
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* Dump all GPIO registers associated with the base address of the provided
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* pinset.
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_GPIO_INFO
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int imxrt_dump_gpio(uint32_t pinset, const char *msg);
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#else
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# define imxrt_dumpgpio(p,m)
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ARCH_ARM_SRC_IMXRT_IMXRT_GPIO_H */
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