Abdelatif Guettouche 27d5c9340a esp32_allocateheap.c: Don't allocate the ROM CPU regions the same way in ...

QEMU, the image is different.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>

2021-03-18 11:28:36 +09:00

..

esp32

esp32_allocateheap.c: Don't allocate the ROM CPU regions the same way in

2021-03-18 11:28:36 +09:00

lx6

arch: Fix included directed -> included directly

2020-04-05 22:31:15 +01:00

xtensa

sourcefiles: Fix relative path in file header

2021-03-09 23:18:28 +08:00

.gitignore

Remove exra whitespace from files (#189)

2020-01-31 09:24:49 -06:00

arch.h

esp32/esp32_allocateheap.c: Support the maximum available internal heap configuration

2021-03-02 18:27:20 -08:00

elf.h

xtensa: Implement a few relocations

2020-03-16 07:54:49 -06:00

inttypes.h

xtensa inttypes.h: Remove PRI/SCN macros for fast and least types

2020-11-05 18:49:22 -08:00

irq.h

arch/xtensa/include/irq.h: Reserve some space for interptee's BSA.

2020-12-09 09:44:04 -03:00

limits.h

Remove exra whitespace from files (#189)

2020-01-31 09:24:49 -06:00

loadstore.h

esp32: emulate byte access for module text

2020-03-16 07:54:49 -06:00

simcall.h

xtensa: Implement simcall

2020-03-12 09:03:31 -05:00

spinlock.h

arch&boards/xtensa: Fix some typos, references to STM/ARM code and

2020-08-27 05:48:55 -07:00

syscall.h

arch: Fix included directed -> included directly

2020-04-05 22:31:15 +01:00

tls.h

arch: Move *_getsp to the common place arch/arch.h

2020-07-09 13:51:09 +01:00

types.h

xtensa: Add _intmax_t and _uintmax_t

2020-11-19 00:49:56 -08:00