bfdeccff4d
Gregory Nutt has submitted the SGA and we can migrate the licenses to Apache. Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
129 lines
4.7 KiB
Plaintext
129 lines
4.7 KiB
Plaintext
/****************************************************************************
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* boards/hc/m9s12/demo9s12ne64/scripts/demo9s12ne64-banked.ld
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* The DEMO9S12NE64 has 64Kb of FLASH and 8Kb of SRAM that are assumed to be
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* paged and positioned as below:
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*/
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MEMORY
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{
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/* The 8Kb SRAM is mapped to 0x2000-0x2fff. The top 256 bytes are reserved
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* for the serial monitor stack space.
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*/
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sram (rwx) : ORIGIN = 0x2000, LENGTH = 8K-256
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/* Two fixed text flash pages (corresponding to page 3e and 3f) */
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lowtext(rx) : ORIGIN = 0x4000, LENGTH = 16K /* Page 3e */
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hitext (rx) : ORIGIN = 0xc000, LENGTH = 16K-2k /* Page 3f */
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/* Flash memory pages:
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*
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* The MC9S12NE64 implements 6 bits of the PPAGE register which gives it a
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* 1 Mbyte program memory address space that is accessed through the PPAGE
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* window. The lower 768K portion (0x000000-0x0bffff) of the address space
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* is accessed with PPAGE values 0x00 through 0x2f. This address range
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* is reserved for external memory when the part is operated in expanded
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* mode. The upper 256K of the address space (0x0c0000-0x100000), accessed
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* with PPAGE values 0x30 through 0x3f, is occupied by on chip flash.
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*/
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page30 (rx) : ORIGIN = 0x0c0000, LENGTH = 16K /* Page 30 */
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page31 (rx) : ORIGIN = 0x0c4000, LENGTH = 16K /* Page 31 */
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page32 (rx) : ORIGIN = 0x0c8000, LENGTH = 16K /* Page 32 */
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page33 (rx) : ORIGIN = 0x0cc000, LENGTH = 16K /* Page 33 */
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page34 (rx) : ORIGIN = 0x0d0000, LENGTH = 16K /* Page 34 */
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page35 (rx) : ORIGIN = 0x0d4000, LENGTH = 16K /* Page 35 */
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page36 (rx) : ORIGIN = 0x0d8000, LENGTH = 16K /* Page 36 */
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page37 (rx) : ORIGIN = 0x0dc000, LENGTH = 16K /* Page 37 */
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page38 (rx) : ORIGIN = 0x0e0000, LENGTH = 16K /* Page 38 */
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page39 (rx) : ORIGIN = 0x0e4000, LENGTH = 16K /* Page 39 */
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page3a (rx) : ORIGIN = 0x0e8000, LENGTH = 16K /* Page 3a */
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page3b (rx) : ORIGIN = 0x0ec000, LENGTH = 16K /* Page 3b */
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page3c (rx) : ORIGIN = 0x0f0000, LENGTH = 16K /* Page 3c */
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page3d (rx) : ORIGIN = 0x0f4000, LENGTH = 16K /* Page 3d */
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page3e (rx) : ORIGIN = 0x0f8000, LENGTH = 16K /* Page 3e */
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page3f (rx) : ORIGIN = 0x0fc000, LENGTH = 16K-2K /* Page 3f */
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/* Vectors. These get relocated to 0xf780-f7ff by the serial loader */
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vectors (rx) : ORIGIN = 0xff80, LENGTH = 256
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}
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ENTRY(_stext)
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SECTIONS
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{
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.text : {
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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_etext = ABSOLUTE(.);
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} > hitext
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_eronly = ABSOLUTE(.); /* See below */
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.data : {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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_edata = ABSOLUTE(.);
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} > sram AT > lowtext
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.bss : { /* BSS */
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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_ebss = ABSOLUTE(.);
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} > sram
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.vectors : {
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_svectors = ABSOLUTE(.);
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*(.vectors)
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_evectors = ABSOLUTE(.);
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} > vectors
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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