b984752aec
* arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer * arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2 * arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly * arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling * arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure * arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method * arch: x86_64: Fix C alias of page table and GDT/IST * arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup * arch: x86_64: Consolidate MSR definition in arch/arch.h * arch: x86_64: Edit the way of handling GDT/IST in C into structures * arch: x86_64: Correct the starting point of isr/irq stack * arch: x86_64: Update up_initialize.c with the new initializing procedure * arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT * arch: x86_64: Overhual of interrupt initialization procedure * arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory] * arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure * arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug * arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot * arch: x86_64: Correctly apply license header, comment and format code * arch: x86_64: properly send a SIGFPE on floating point error * arch: x86_64: Remove unused variable in up_restore_auxstate * arch: x86_64: properly trash the processor with an infinite loop * arch: x86_64: Fix typo in ISR handler causing ISR not handled * arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path * arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE * arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method * board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support * arch: x86_64: update defconfigs * arch: x86_64: rename qemu as qemu-intel64 * arch: x86_64: update Board readme
115 lines
3.1 KiB
Plaintext
115 lines
3.1 KiB
Plaintext
/****************************************************************************
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* boards/x86_64/intel64/qemu/scripts/qemu.ld
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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OUTPUT_ARCH(i386:x86-64)
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ENTRY(__pmode_entry)
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SECTIONS
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{
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. = 0x4M;
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_kernel_physical_start = .;
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.loader.text : {
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. = ALIGN(8);
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KEEP(*(.multiboot))
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*(.loader.text)
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}
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.loader.rodata : {
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*(.loader.rodata)
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}
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.loader.data : {
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*(.loader.data)
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}
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.loader.bss : {
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*(.loader.bss)
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}
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. = ALIGN(0x1000);
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_boot_end = .;
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. += 0x100000000;
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_kernel_virtual_start = .;
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.text : AT(_boot_end)
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{
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_stext = ABSOLUTE(.);
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. = ALIGN(8);
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KEEP(*(.multiboot))
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*(.text .text.*)
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*(.gnu.linkonce.t.*)
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_etext = ABSOLUTE(.);
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}
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.rodata ALIGN(0x1000) : AT ( (LOADADDR (.text) + SIZEOF (.text) + 0xFFF) & 0xFFFFFFFFFFFFF000 )
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{
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_srodata = ABSOLUTE(.);
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*(.rodata .rodata.*)
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*(.fixup)
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*(.gnu.warning)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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*(.eh_frame)
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_erodata = ABSOLUTE(.);
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}
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.data ALIGN(0x1000) : AT ( (LOADADDR (.rodata) + SIZEOF (.rodata) + 0xFFF) & 0xFFFFFFFFFFFFF000 )
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{
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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}
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.bss ALIGN(0x1000) : AT ( (LOADADDR (.data) + SIZEOF (.data) + 0xFFF) & 0xFFFFFFFFFFFFF000 )
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{
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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}
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_kernel_virtual_end = .;
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_kernel_physical_end = (LOADADDR (.bss) + SIZEOF (.bss) + 0xFFF) & 0xFFFFFFFFFFFFF000;
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/* Stabs debugging sections */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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