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nuttx/boards/risc-v
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Jukka Laitinen 1c8a661c9f boards/risc-v/mpfs/m100pfsevp/include/board_liberodefs.h: Update memory initialization parameters 
Sync some of the AXI configuration and DDR training parameters with the manufacturer's
defaults.

The TIP_CFG parameter correction helps with DDR training failures on some individual boards
The AXI end address values fix early random crash in power-on boot on some individual boards

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-06-17 15:40:21 +08:00
..
bl602/bl602evb boards/xxx: Remove CONFIG_SCHED_ATEXIT/ONEXIT from all defconfigs 2022-05-25 15:28:43 +08:00
c906/smartl-c906 risc-v: Move "LDFLAGS += -melf32lriscv" from Make.defs to Toolchain.defs 2022-05-16 11:17:08 +03:00
esp32c3/esp32c3-devkit risc-v/esp32c3: Disable access to invalid memory regions using MPU 2022-06-11 01:55:46 +08:00
fe310/hifive1-revb Fix wrong path in README for RISC-V 2022-06-05 16:05:40 +08:00
k210/maix-bit Fix wrong path in README for RISC-V 2022-06-05 16:05:40 +08:00
litex/arty_a7 Fix wrong path in README for RISC-V 2022-06-05 16:05:40 +08:00
mpfs boards/risc-v/mpfs/m100pfsevp/include/board_liberodefs.h: Update memory initialization parameters 2022-06-17 15:40:21 +08:00
qemu-rv/rv-virt Fix wrong path in README for RISC-V 2022-06-05 16:05:40 +08:00
rv32m1/rv32m1-vega risc-v: Move "LDFLAGS += -melf32lriscv" from Make.defs to Toolchain.defs 2022-05-16 11:17:08 +03:00