chao an b15c1a441a arm/gicv3: set routing affinity before enable IRQ ...

In corner case, the pending ISR will be triggered immediately
after enable the IRQ, this PR will setting CPU affinity first
to avoid routing the unexpected IRQ to other CPUs.

Signed-off-by: chao an <anchao@lixiang.com>

2024-09-03 19:14:14 -03:00

..

include

protected build: userspace threads will unexpectly work in privileged mode after syscall

2024-08-28 13:44:37 +08:00

src

arm/gicv3: set routing affinity before enable IRQ

2024-09-03 19:14:14 -03:00

CMakeLists.txt

build: add initial cmake build system

2023-07-08 13:50:48 +08:00

Kconfig

arch: cxd56xx: Add logic for i2c reset

2024-08-27 12:29:46 +02:00