2aa85fd17e
Summary The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_. This PR addresses only these name changes for the ARM-private functions prototyped in arm_internal.h This change to the files only modifies the name of called functions. nxstyle fixes were made for all core architecture files. However, there are well over 5000 additional complaints from MCU drivers and board logic that are unrelated to to this change but were affected by the name change. It is not humanly possible to fix all of these. I ask that this change be treated like other cosmetic changes that we have done which do not require full nxstyle compliance. Impact There should be not impact of this change (other that one step toward more consistent naming). Testing stm32f4discovery:netnsh
386 lines
12 KiB
C
386 lines
12 KiB
C
/****************************************************************************
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* arch/arm/src/sam34/sam_allocateheap.c
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*
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* Copyright (C) 2010, 2013, 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/board.h>
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#include <nuttx/kmalloc.h>
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#include <arch/board/board.h>
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#include "mpu.h"
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#include "arm_arch.h"
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#include "arm_internal.h"
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#include "chip.h"
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#include "sam_mpuinit.h"
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#include "sam_periphclks.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* All SAM's have SRAM0. The SAM3U family also have SRAM1 and possibly
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* NFCSRAM. NFCSRAM may not be used, however, if NAND support is enabled.
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* In addition, the SAM3U and SAM4S have external SRAM at CS0 (EXTSRAM0).
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* Support for external SRAM at CS1-3 is not fully implemented.
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*/
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#undef HAVE_SRAM1_REGION /* Assume no internal SRAM1 */
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#undef HAVE_NFCSRAM_REGION /* Assume no NFC SRAM */
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#undef HAVE_EXTSRAM0_REGION /* Assume no external SRAM at CS0 */
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#undef HAVE_EXTSRAM1_REGION /* Assume no external SRAM at CS1 */
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#undef HAVE_EXTSRAM2_REGION /* Assume no external SRAM at CS2 */
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#undef HAVE_EXTSRAM3_REGION /* Assume no external SRAM at CS3 */
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/* Check if external SRAM is supported and, if so, it is is intended
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* to be used as heap.
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*/
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#if !defined(CONFIG_SAM34_EXTSRAM0) || !defined(CONFIG_SAM34_EXTSRAM0HEAP)
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# undef CONFIG_SAM34_EXTSRAM0SIZE
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# define CONFIG_SAM34_EXTSRAM0SIZE 0
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#endif
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#if !defined(CONFIG_SAM34_EXTSRAM1) || !defined(CONFIG_SAM34_EXTSRAM1HEAP)
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# undef CONFIG_SAM34_EXTSRAM1SIZE
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# define CONFIG_SAM34_EXTSRAM1SIZE 0
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#endif
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#if !defined(CONFIG_SAM34_EXTSRAM2) || !defined(CONFIG_SAM34_EXTSRAM2HEAP)
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# undef CONFIG_SAM34_EXTSRAM2SIZE
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# define CONFIG_SAM34_EXTSRAM2SIZE 0
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#endif
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#if !defined(CONFIG_SAM34_EXTSRAM3) || !defined(CONFIG_SAM34_EXTSRAM3HEAP)
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# undef CONFIG_SAM34_EXTSRAM3SIZE
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# define CONFIG_SAM34_EXTSRAM3SIZE 0
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#endif
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/* SAM3U, SAM3X, and SAM3A Unique memory configurations */
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#if defined(CONFIG_ARCH_CHIP_SAM3U) || defined(CONFIG_ARCH_CHIP_SAM3X) || \
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defined(CONFIG_ARCH_CHIP_SAM3A)
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# ifdef CONFIG_SAM34_NAND
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# undef SAM34_NFCSRAM_SIZE
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# define SAM34_NFCSRAM_SIZE 0
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# endif
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# if SAM34_SRAM1_SIZE > 0
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# if CONFIG_MM_REGIONS > 1
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# define HAVE_SRAM1_REGION 1
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# else
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# warning "CONFIG_MM_REGIONS < 2: SRAM1 not included in HEAP"
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# endif
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# endif
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# if SAM34_NFCSRAM_SIZE > 0
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# if CONFIG_MM_REGIONS > 2
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# define HAVE_NFCSRAM_REGION
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# else
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# warning "CONFIG_MM_REGIONS < 3: NFC SRAM not included in HEAP"
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# endif
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# if CONFIG_SAM34_EXTSRAM0SIZE > 0
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# if CONFIG_MM_REGIONS > 3
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# define HAVE_EXTSRAM0_REGION 1
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# else
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# warning "CONFIG_MM_REGIONS < 4: External SRAM not included in HEAP"
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# endif
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# endif
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# elif CONFIG_SAM34_EXTSRAM0SIZE > 0
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# if CONFIG_MM_REGIONS > 2
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# define HAVE_EXTSRAM0_REGION 1
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# else
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# warning "CONFIG_MM_REGIONS < 3: External SRAM not included in HEAP"
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# endif
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# endif
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#else
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/* The SAM4S and SAM4L may have only internal SRAM0 and external SRAM0 */
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# if CONFIG_SAM34_EXTSRAM0SIZE > 0
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# if CONFIG_MM_REGIONS > 1
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# define HAVE_EXTSRAM0_REGION 1
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# else
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# warning "CONFIG_MM_REGIONS < 2: External SRAM not included in HEAP"
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# endif
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# endif
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#endif
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/* Check common SRAM0 configuration */
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#if CONFIG_RAM_END > (SAM_INTSRAM0_BASE+SAM34_SRAM0_SIZE)
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# error "CONFIG_RAM_END is beyond the end of SRAM0"
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# undef CONFIG_RAM_END
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# define CONFIG_RAM_END (SAM_INTSRAM0_BASE+SAM34_SRAM0_SIZE)
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#elif CONFIG_RAM_END < (SAM_INTSRAM0_BASE+SAM34_SRAM0_SIZE)
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# warning "CONFIG_RAM_END is before end of SRAM0... not all of SRAM0 used"
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#endif
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_allocate_heap
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*
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* Description:
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* This function will be called to dynamically set aside the heap region.
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*
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* For the kernel build (CONFIG_BUILD_PROTECTED=y) with both kernel- and
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* user-space heaps (CONFIG_MM_KERNEL_HEAP=y), this function provides the
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* size of the unprotected, user-space heap.
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*
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* If a protected kernel-space heap is provided, the kernel heap must be
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* allocated (and protected) by an analogous up_allocate_kheap().
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*
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* The following memory map is assumed for the flat build:
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*
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* .data region. Size determined at link time.
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* .bss region Size determined at link time.
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* IDLE thread stack. Size determined by CONFIG_IDLETHREAD_STACKSIZE.
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* Heap. Extends to the end of SRAM.
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*
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* The following memory map is assumed for the kernel build:
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*
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* Kernel .data region. Size determined at link time.
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* Kernel .bss region Size determined at link time.
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* Kernel IDLE thread stack. Size determined by CONFIG_IDLETHREAD_STACKSIZE.
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* Padding for alignment
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* User .data region. Size determined at link time.
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* User .bss region Size determined at link time.
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* Kernel heap. Size determined by CONFIG_MM_KERNEL_HEAPSIZE.
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* User heap. Extends to the end of SRAM.
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*
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****************************************************************************/
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void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
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{
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
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/* Get the unaligned size and position of the user-space heap.
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* This heap begins after the user-space .bss section at an offset
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* of CONFIG_MM_KERNEL_HEAPSIZE (subject to alignment).
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*/
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uintptr_t ubase = (uintptr_t)USERSPACE->us_bssend + CONFIG_MM_KERNEL_HEAPSIZE;
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size_t usize = CONFIG_RAM_END - ubase;
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int log2;
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DEBUGASSERT(ubase < (uintptr_t)CONFIG_RAM_END);
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/* Adjust that size to account for MPU alignment requirements.
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* NOTE that there is an implicit assumption that the CONFIG_RAM_END
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* is aligned to the MPU requirement.
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*/
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log2 = (int)mpu_log2regionfloor(usize);
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DEBUGASSERT((CONFIG_RAM_END & ((1 << log2) - 1)) == 0);
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usize = (1 << log2);
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ubase = CONFIG_RAM_END - usize;
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/* Return the user-space heap settings */
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board_autoled_on(LED_HEAPALLOCATE);
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*heap_start = (FAR void *)ubase;
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*heap_size = usize;
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/* Allow user-mode access to the user heap memory */
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sam_mpu_uheap((uintptr_t)ubase, usize);
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#else
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/* Return the heap settings */
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board_autoled_on(LED_HEAPALLOCATE);
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*heap_start = (FAR void *)g_idle_topstack;
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*heap_size = CONFIG_RAM_END - g_idle_topstack;
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#endif
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}
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/****************************************************************************
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* Name: up_allocate_kheap
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*
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* Description:
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* For the kernel build (CONFIG_BUILD_PROTECTED=y) with both kernel- and
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* user-space heaps (CONFIG_MM_KERNEL_HEAP=y), this function allocates
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* (and protects) the kernel-space heap.
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*
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****************************************************************************/
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
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void up_allocate_kheap(FAR void **heap_start, size_t *heap_size)
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{
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/* Get the unaligned size and position of the user-space heap.
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* This heap begins after the user-space .bss section at an offset
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* of CONFIG_MM_KERNEL_HEAPSIZE (subject to alignment).
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*/
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uintptr_t ubase = (uintptr_t)USERSPACE->us_bssend + CONFIG_MM_KERNEL_HEAPSIZE;
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size_t usize = CONFIG_RAM_END - ubase;
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int log2;
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DEBUGASSERT(ubase < (uintptr_t)CONFIG_RAM_END);
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/* Adjust that size to account for MPU alignment requirements.
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* NOTE that there is an implicit assumption that the CONFIG_RAM_END
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* is aligned to the MPU requirement.
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*/
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log2 = (int)mpu_log2regionfloor(usize);
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DEBUGASSERT((CONFIG_RAM_END & ((1 << log2) - 1)) == 0);
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usize = (1 << log2);
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ubase = CONFIG_RAM_END - usize;
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/* Return the kernel heap settings (i.e., the part of the heap region
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* that was not dedicated to the user heap).
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*/
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*heap_start = (FAR void *)USERSPACE->us_bssend;
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*heap_size = ubase - (uintptr_t)USERSPACE->us_bssend;
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}
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#endif
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/****************************************************************************
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* Name: arm_addregion
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*
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* Description:
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* Memory may be added in non-contiguous chunks. Additional chunks are
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* added by calling this function.
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*
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****************************************************************************/
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#if CONFIG_MM_REGIONS > 1
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void arm_addregion(void)
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{
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/* The SAM3U also have SRAM1 and NFCSRAM, We will add these as regions
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* the first two additional memory regions if we have them.
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*/
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#ifdef HAVE_SRAM1_REGION
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/* Allow user access to the heap memory */
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sam_mpu_uheap(SAM_INTSRAM1_BASE, SAM34_SRAM1_SIZE);
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/* Add the region */
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kumm_addregion((FAR void *)SAM_INTSRAM1_BASE, SAM34_SRAM1_SIZE);
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#endif /* HAVE_SRAM1_REGION */
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#ifdef HAVE_NFCSRAM_REGION
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#if defined(CONFIG_ARCH_CHIP_SAM3X) || defined(CONFIG_ARCH_CHIP_SAM3A)
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/* In the 3X/3A family I note that clocking must appled to the SMC module
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* in order for the NFCS SRAM to be functional. I don't recall such an
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* issue with the 3U.
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*/
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sam_smc_enableclk();
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#endif
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/* Allow user access to the heap memory */
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sam_mpu_uheap(SAM_NFCSRAM_BASE, SAM34_NFCSRAM_SIZE);
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/* Add the region */
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kumm_addregion((FAR void *)SAM_NFCSRAM_BASE, SAM34_NFCSRAM_SIZE);
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#endif /* HAVE_NFCSRAM_REGION */
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#ifdef HAVE_EXTSRAM0_REGION
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/* Allow user access to the heap memory */
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sam_mpu_uheap(SAM_EXTCS0_BASE, CONFIG_SAM34_EXTSRAM0SIZE);
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/* Add the region */
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kumm_addregion((FAR void *)SAM_EXTCS0_BASE, CONFIG_SAM34_EXTSRAM0SIZE);
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#endif /* HAVE_EXTSRAM0_REGION */
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#ifdef HAVE_EXTSRAM1_REGION
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/* Allow user access to the heap memory */
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sam_mpu_uheap(SAM_EXTCS1_BASE, CONFIG_SAM34_EXTSRAM1SIZE);
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/* Add the region */
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kumm_addregion((FAR void *)SAM_EXTCS1_BASE, CONFIG_SAM34_EXTSRAM1SIZE);
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#endif /* HAVE_EXTSRAM0_REGION */
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#ifdef HAVE_EXTSRAM2_REGION
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/* Allow user access to the heap memory */
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sam_mpu_uheap(SAM_EXTCS2_BASE, CONFIG_SAM34_EXTSRAM2SIZE);
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/* Add the region */
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kumm_addregion((FAR void *)SAM_EXTCS2_BASE, CONFIG_SAM34_EXTSRAM2SIZE);
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#endif /* HAVE_EXTSRAM0_REGION */
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#ifdef HAVE_EXTSRAM3_REGION
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/* Allow user access to the heap memory */
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sam_mpu_uheap(SAM_EXTCS3_BASE, CONFIG_SAM34_EXTSRAM3SIZE);
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/* Add the region */
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kumm_addregion((FAR void *)SAM_EXTCS3_BASE, CONFIG_SAM34_EXTSRAM3SIZE);
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#endif /* HAVE_EXTSRAM0_REGION */
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}
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#endif /* CONFIG_MM_REGIONS > 1 */
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