Xiang Xiao 94da3e4c3a arch: Remove critical section inside up_schedule_sigaction
since nxsig_tcbdispatch already hold it for us

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I2fe6ad840bdca3ec0eaa76a9af3b6929c7d5a721
2021-01-22 08:34:07 +01:00
..
2020-09-24 10:10:40 +01:00

This directory provides a build area for all Renesas and legacy Hitachi
architectures.  The 'common' subdirectory contains source files shared by
all Renesas architectures; Source files unique to a specific Renesas chip
architecture are contained in a subdirectory named after the chip.  At
configuration time, additional directories will be linked here:  'board'
will be a link to the boards/renesas/<chip>/<board>/src directory; 'chip'
will be a link to the SH chip sub-directory.