150 lines
5.0 KiB
C
150 lines
5.0 KiB
C
/****************************************************************************
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* arch/arm/src/armv7-m/arch_clean_dcache.c
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Some logic in this header file derives from the ARM CMSIS core_cm7.h
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* header file which has a compatible 3-clause BSD license:
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*
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* Copyright (c) 2009 - 2014 ARM LIMITED. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name ARM, NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "cache.h"
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#if defined(CONFIG_ARMV7M_DCACHE) && !defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH)
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arch_clean_dcache
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*
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* Description:
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* Clean the data cache within the specified region by flushing the
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* contents of the data cache to memory.
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*
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* Input Parameters:
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* start - virtual start address of region
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* end - virtual end address of region + 1
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*
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* Returned Value:
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* None
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*
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* Assumptions:
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* This operation is not atomic. This function assumes that the caller
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* has exclusive access to the address range so that no harm is done if
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* the operation is pre-empted.
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*
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****************************************************************************/
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void arch_clean_dcache(uintptr_t start, uintptr_t end)
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{
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uint32_t ccsidr;
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uint32_t smask;
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uint32_t sshift;
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uint32_t ways;
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uint32_t wshift;
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uint32_t ssize;
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uint32_t set;
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uint32_t sw;
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/* Get the characteristics of the D-Cache */
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ccsidr = getreg32(NVIC_CCSIDR);
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smask = CCSIDR_SETS(ccsidr); /* (Number of sets) - 1 */
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sshift = CCSIDR_LSSHIFT(ccsidr) + 4; /* log2(cache-line-size-in-bytes) */
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ways = CCSIDR_WAYS(ccsidr); /* (Number of ways) - 1 */
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/* Calculate the bit offset for the way field in the DCCSW register by
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* counting the number of leading zeroes. For example:
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*
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* Number of Value of ways Field
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* Ways 'ways' Offset
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* 2 1 31
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* 4 3 30
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* 8 7 29
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* ...
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*/
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wshift = arm_clz(ways) & 0x1f;
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/* Clean the D-Cache over the range of addresses */
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ssize = (1 << sshift);
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start &= ~(ssize - 1);
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ARM_DSB();
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do
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{
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int32_t tmpways = ways;
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/* Isolate the cache line associated with this address. For example
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* if the cache line size is 32 bytes and the cache size is 16KB, then
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*
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* sshift = 5 : Offset to the beginning of the set field
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* smask = 0x007f : Mask of the set field
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*/
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set = ((uint32_t)start >> sshift) & smask;
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/* Clean and invalidate each way for this cacheline */
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do
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{
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sw = ((tmpways << wshift) | (set << sshift));
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putreg32(sw, NVIC_DCCSW);
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}
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while (tmpways--);
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/* Increment the address by the size of one cache line. */
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start += ssize;
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}
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while (start < end);
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ARM_DSB();
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ARM_ISB();
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}
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#endif /* CONFIG_ARMV7M_DCACHE && !CONFIG_ARMV7M_DCACHE_WRITETHROUGH */
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