122 lines
6.0 KiB
C
122 lines
6.0 KiB
C
/****************************************************************************************
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* arch/arm/src/sam34/chip/sam4l_picouart.h
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAM34_CHIP_SAM4L_PICOUART_H
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#define __ARCH_ARM_SRC_SAM34_CHIP_SAM4L_PICOUART_H
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/****************************************************************************************
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* Included Files
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****************************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#include "chip/sam_memorymap.h"
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/****************************************************************************************
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* Pre-processor Definitions
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****************************************************************************************/
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/* PICOUART register offsets ************************************************************/
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#define SAM_PICOUART_CR_OFFSET 0x0000 /* Control Register */
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#define SAM_PICOUART_CFG_OFFSET 0x0004 /* Configuration Register */
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#define SAM_PICOUART_SR_OFFSET 0x0008 /* Status Register */
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#define SAM_PICOUART_RHR_OFFSET 0x000c /* Receive Holding Register */
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#define SAM_PICOUART_VERSION_OFFSET 0x0020 /* Version Register */
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/* PICOUART register addresses **********************************************************/
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#define SAM_PICOUART_CR_OFFSET 0x0000 /* Control Register */
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#define SAM_PICOUART_CR_OFFSET 0x0000 /* Control Register */
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#define SAM_PICOUART_CFG_OFFSET 0x0004 /* Configuration Register */
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#define SAM_PICOUART_CFG_OFFSET 0x0004 /* Configuration Register */
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#define SAM_PICOUART_SR_OFFSET 0x0008 /* Status Register */
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#define SAM_PICOUART_SR_OFFSET 0x0008 /* Status Register */
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#define SAM_PICOUART_RHR_OFFSET 0x000c /* Receive Holding Register */
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#define SAM_PICOUART_RHR_OFFSET 0x000c /* Receive Holding Register */
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#define SAM_PICOUART_VERSION_OFFSET 0x0020 /* Version Register */
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#define SAM_PICOUART_VERSION_OFFSET 0x0020 /* Version Register */
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/* PICOUART register bit definitions ****************************************************/
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/* Control Register */
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#define PICOUART_CR_EN (1 << 0) /* Bit 0: Enable */
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#define PICOUART_CR_DIS (1 << 1) /* Bit 1: Disable */
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/* Configuration Register */
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#define PICOUART_CFG_SOURCE_SHIFT (0) /* Bit 0-1: Source Enable Mode */
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#define PICOUART_CFG_SOURCE_MASK (3 << PICOUART_CFG_SOURCE_SHIFT)
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# define PICOUART_CFG_SOURCE_WE (0 << PICOUART_CFG_SOURCE_SHIFT) /* Wake up and event disable */
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# define PICOUART_CFG_SOURCE_WESB (1 << PICOUART_CFG_SOURCE_SHIFT) /* Wake up or event enable on start bit detection */
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# define PICOUART_CFG_SOURCE_WEFF (2 << PICOUART_CFG_SOURCE_SHIFT) /* Wake up or event enable on full frame reception */
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# define PICOUART_CFG_SOURCE_WECH (3 << PICOUART_CFG_SOURCE_SHIFT) /* Wake up or event enable on character recognition */
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#define PICOUART_CFG_ACTION (1 << 0) /* Bit 0: Action to perform */
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#define PICOUART_CFG_MATCH_SHIFT (8) /* Bit 8-15: Data Match */
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#define PICOUART_CFG_MATCH_SHIFT (8) /* Bit 8-15: Data Match */
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#define PICOUART_CFG_MATCH_MASK (0xff << PICOUART_CFG_MATCH_SHIFT)
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/* Status Register */
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#define PICOUART_SR_EN (1 << 0) /* Bit 0: Enable Status */
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#define PICOUART_SR_DRDY (1 << 1) /* Bit 1: Data Ready */
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/* Receive Holding Register */
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#define PICOUART_RHR_MASK 0xff
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/* Version Register */
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#define PICOUART_VERSION_SHIFT (0) /* Bits 0-11: Macrocell version number */
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#define PICOUART_VERSION_MASK (0xfff << PICOUART_VERSION_SHIFT)
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#define PICOUART_VARIANT_SHIFT (16) /* Bits 16-18: Reserved */
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#define PICOUART_VARIANT_MASK (7 << PICOUART_VARIANT_SHIFT)
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/****************************************************************************************
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* Public Types
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****************************************************************************************/
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/****************************************************************************************
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* Public Data
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****************************************************************************************/
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/****************************************************************************************
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* Public Functions
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****************************************************************************************/
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#endif /* __ARCH_ARM_SRC_SAM34_CHIP_SAM4L_PICOUART_H */
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