zhangyuan21 fb12e7530d sched/smp: flush dcache before start other cpus
core0 may write the data used by other cpu, this will cause cache inconsistency.
so need fulsh dcache before start other cpus.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-08-21 12:02:45 +08:00
..
2023-08-19 21:50:08 +08:00