54e630e14d
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
231 lines
6.5 KiB
C
231 lines
6.5 KiB
C
/****************************************************************************
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* arch/risc-v/src/fe310/fe310_gpio.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/spinlock.h>
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#include <arch/board/board.h>
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#include "riscv_internal.h"
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#include "fe310_gpio.h"
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#include "fe310_memorymap.h"
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: fe310_gpio_getpin()
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****************************************************************************/
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static uint32_t fe310_gpio_getpin(uint16_t gpiocfg)
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{
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return ((gpiocfg & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
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}
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/****************************************************************************
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* Name: fe310_gpio_configinput()
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****************************************************************************/
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static int fe310_gpio_configinput(uint16_t gpiocfg)
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{
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uint32_t pin = fe310_gpio_getpin(gpiocfg);
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/* Enable input & disable output */
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modifyreg32(FE310_GPIO_INPUT_EN, 0, 0x1 << pin);
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modifyreg32(FE310_GPIO_OUTPUT_EN, 0x1 << pin, 0);
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return 0;
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}
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/****************************************************************************
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* Name: fe310_gpio_configirq()
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****************************************************************************/
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static int fe310_gpio_configirq(uint16_t gpiocfg)
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{
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uint32_t pin = fe310_gpio_getpin(gpiocfg);
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/* Enable input & disable output */
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modifyreg32(FE310_GPIO_INPUT_EN, 0, 0x1 << pin);
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modifyreg32(FE310_GPIO_OUTPUT_EN, 0x1 << pin, 0);
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/* Disable all gpio interrupts for the pin */
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modifyreg32(FE310_GPIO_RISE_IE, 0x1 << pin, 0x0);
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modifyreg32(FE310_GPIO_FALL_IE, 0x1 << pin, 0x0);
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modifyreg32(FE310_GPIO_HIGH_IE, 0x1 << pin, 0x0);
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modifyreg32(FE310_GPIO_LOW_IE, 0x1 << pin, 0x0);
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/* Then enable interrupt */
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switch (gpiocfg & GPIO_INT_MASK)
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{
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case GPIO_INT_RISE:
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modifyreg32(FE310_GPIO_RISE_IE, 0, 0x1 << pin);
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break;
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case GPIO_INT_FALL:
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modifyreg32(FE310_GPIO_FALL_IE, 0, 0x1 << pin);
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break;
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case GPIO_INT_BOTH:
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modifyreg32(FE310_GPIO_RISE_IE, 0, 0x1 << pin);
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modifyreg32(FE310_GPIO_FALL_IE, 0, 0x1 << pin);
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break;
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case GPIO_INT_HIGH:
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modifyreg32(FE310_GPIO_HIGH_IE, 0, 0x1 << pin);
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break;
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case GPIO_INT_LOW:
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modifyreg32(FE310_GPIO_LOW_IE, 0, 0x1 << pin);
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break;
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}
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return 0;
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}
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/****************************************************************************
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* Name: fe310_gpio_configoutput()
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****************************************************************************/
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static int fe310_gpio_configoutput(uint16_t gpiocfg)
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{
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uint32_t pin = fe310_gpio_getpin(gpiocfg);
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/* TOD: set initial value */
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/* Disable input & enable output */
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modifyreg32(FE310_GPIO_INPUT_EN, 0x1 << pin, 0);
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modifyreg32(FE310_GPIO_OUTPUT_EN, 0, 0x1 << pin);
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return 0;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: fe310_gpio_config
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****************************************************************************/
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int fe310_gpio_config(uint16_t gpiocfg)
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{
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int ret = 0;
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irqstate_t flags;
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uint32_t pin = fe310_gpio_getpin(gpiocfg);
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flags = spin_lock_irqsave(NULL);
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/* Disable IOF for the pin to be used as GPIO */
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modifyreg32(FE310_GPIO_IOF_EN, 0x1 << pin, 0);
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/* Pullup */
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if (gpiocfg & GPIO_PULLUP)
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{
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modifyreg32(FE310_GPIO_PU_EN, 0, 0x1 << pin);
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}
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else
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{
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modifyreg32(FE310_GPIO_PU_EN, 0x1 << pin, 0);
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}
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switch (gpiocfg & GPIO_MODE_MASK)
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{
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case GPIO_MODE_INPUT:
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ret = fe310_gpio_configinput(gpiocfg);
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break;
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case GPIO_MODE_OUTPUT:
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ret = fe310_gpio_configoutput(gpiocfg);
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break;
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case GPIO_MODE_INIRQ:
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ret = fe310_gpio_configirq(gpiocfg);
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break;
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}
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spin_unlock_irqrestore(NULL, flags);
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return ret;
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}
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/****************************************************************************
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* Name: fe310_gpio_write
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****************************************************************************/
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void fe310_gpio_write(uint16_t gpiocfg, bool value)
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{
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uint32_t pin = fe310_gpio_getpin(gpiocfg);
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if (value)
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{
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modifyreg32(FE310_GPIO_OUTPUT_VAL, 0, 0x1 << pin);
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}
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else
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{
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modifyreg32(FE310_GPIO_OUTPUT_VAL, 0x1 << pin, 0);
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}
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}
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/****************************************************************************
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* Name: fe310_gpio_read
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****************************************************************************/
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bool fe310_gpio_read(uint16_t gpiocfg)
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{
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uint32_t pin = fe310_gpio_getpin(gpiocfg);
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return (getreg32(FE310_GPIO_INPUT_VAL) & (0x1 << pin)) != 0;
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}
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/****************************************************************************
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* Name: fe310_gpio_clearpending
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****************************************************************************/
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void fe310_gpio_clearpending(uint32_t pin)
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{
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ASSERT(0 <= pin && pin <= 31);
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/* Clear all gpio interrupts for the pin */
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modifyreg32(FE310_GPIO_RISE_IP, 0x0, 0x1 << pin);
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modifyreg32(FE310_GPIO_FALL_IP, 0x0, 0x1 << pin);
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modifyreg32(FE310_GPIO_HIGH_IP, 0x0, 0x1 << pin);
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modifyreg32(FE310_GPIO_LOW_IP, 0x0, 0x1 << pin);
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}
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