cde88cabcc
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
184 lines
6.0 KiB
C
184 lines
6.0 KiB
C
/****************************************************************************
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* arch/arm/src/armv7-a/arm_cpustart.c
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <nuttx/arch.h>
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#include <nuttx/sched.h>
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#include <nuttx/sched_note.h>
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#include "up_internal.h"
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#include "cp15_cacheops.h"
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#include "gic.h"
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#include "sched/sched.h"
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#ifdef CONFIG_SMP
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_registerdump
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****************************************************************************/
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#if 0 /* Was useful in solving some startup problems */
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static inline void arm_registerdump(FAR struct tcb_s *tcb)
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{
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int regndx;
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_info("CPU%d:\n", up_cpu_index());
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/* Dump the startup registers */
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for (regndx = REG_R0; regndx <= REG_R15; regndx += 8)
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{
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uint32_t *ptr = (uint32_t *)&tcb->xcp.regs[regndx];
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_info("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
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regndx, ptr[0], ptr[1], ptr[2], ptr[3],
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ptr[4], ptr[5], ptr[6], ptr[7]);
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}
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_info("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]);
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}
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#else
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# define arm_registerdump(tcb)
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_start_handler
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*
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* Description:
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* This is the handler for SGI1. This handler simply returns from the
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* interrupt, restoring the state of the new task at the head of the ready
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* to run list.
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*
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* Input Parameters:
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* Standard interrupt handling
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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int arm_start_handler(int irq, FAR void *context, FAR void *arg)
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{
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FAR struct tcb_s *tcb = this_task();
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sinfo("CPU%d Started\n", this_cpu());
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#ifdef CONFIG_SCHED_INSTRUMENTATION
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/* Notify that this CPU has started */
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sched_note_cpu_started(tcb);
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#endif
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/* Reset scheduler parameters */
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sched_resume_scheduler(tcb);
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/* Dump registers so that we can see what is going to happen on return */
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arm_registerdump(tcb);
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/* Then switch contexts. This instantiates the exception context of the
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* tcb at the head of the assigned task list. In this case, this should
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* be the CPUs NULL task.
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*/
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up_restorestate(tcb->xcp.regs);
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return OK;
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}
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/****************************************************************************
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* Name: up_cpu_start
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*
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* Description:
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* In an SMP configution, only one CPU is initially active (CPU 0). System
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* initialization occurs on that single thread. At the completion of the
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* initialization of the OS, just before beginning normal multitasking,
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* the additional CPUs would be started by calling this function.
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*
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* Each CPU is provided the entry point to is IDLE task when started. A
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* TCB for each CPU's IDLE task has been initialized and placed in the
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* CPU's g_assignedtasks[cpu] list. Not stack has been allocated or
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* initialized.
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*
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* The OS initialization logic calls this function repeatedly until each
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* CPU has been started, 1 through (CONFIG_SMP_NCPUS-1).
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*
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* Input Parameters:
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* cpu - The index of the CPU being started. This will be a numeric
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* value in the range of from one to (CONFIG_SMP_NCPUS-1). (CPU
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* 0 is already active)
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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int up_cpu_start(int cpu)
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{
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sinfo("Starting CPU%d\n", cpu);
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DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
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#ifdef CONFIG_SCHED_INSTRUMENTATION
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/* Notify of the start event */
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sched_note_cpu_start(this_task(), cpu);
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#endif
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/* Make the content of CPU0 L1 cache has been written to coherent L2 */
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cp15_clean_dcache(CONFIG_RAM_START, CONFIG_RAM_END - 1);
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/* Execute SGI1 */
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return arm_cpu_sgi(GIC_IRQ_SGI1, (1 << cpu));
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}
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#endif /* CONFIG_SMP */
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