Peter van der Perk 9906163beb Base IMXRT1170 port
Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com>

Co-authored-by: David Sidrane <david.sidrane@nscdg.com>

Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>

imxrt:Kconfig fix formatting

imxrt:usbphy move IMXRT_USBPHY{1|[2]}_BASE to memory map

imxrt:lpspi Fix build breakage from adding 1170

imxrt:Finish 1170 iomux and clockconfig versioning

imxrt:Remove duplicate imxrt_clock{off|all}_lpi2c4

imxrt:pmu remove duplicate dcd non 117x header

imxrt:lpspi Fix unused var warnings

imxrt:lpi2c Fix unused var warnings

imxrt:lowputs Fix unused var warnings

imxrt:imxrt117x_dmamux fix duplicate entries

imxtr:serial Use IOMUX_PULL_{UP|DOWN} and map IOMUX V1 to them

imxrt:MPU Support the 1170

imxrt:dmamux Alias IMXRT_DMAMUX0_BASE as IMXRT_DMAMUX_BASE

imx1170:ccm Alias CCM_CCGR_DMA & CCM_CCGR_SNVS_LP for compatiblity

Author: Peter van der Perk <peter.vanderperk@nxp.com>

IMXRT7 Add LPUART 9/10/11/12 support

Author: David Sidrane <david.sidrane@nscdg.com>

imxrt:1170pinmux Add QTIMER pins

imxrt:1170pinmux Add GPT pins

imxrt:1170pinmux Add FLEXPWM pins

imxrt1170:pinmap Add GPIO_ENET_1G pinning

imxrt:enet Support ENET_1G

imxrt:periphclks rt1170 does not have canX_serial clock

imxrt:flexcan:Layer imxrt_ioctl

imxrt117x:memorymap added CAN3

imxrt:ADC support ver1 and ver2 for imxrt117x

imxrt:imxrt117x_ccm Align timer naming with other imxrt QTIMERn->TIMERn

imxrt:imxrt117x_ccm align CCM names with rt106x

imxrt:XBAR support larger number of selects needed on imxrt1170

Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>

FlexSPI AHB Region support, PIT rename for compatiblity

imxrt:USB Analog add VBUS_VALID_3V

FlexSPI expand prefetch registers for IMXRT117X

imxrt:Support Initialization of FlexRam without Running from OCRAM

imxrt: ocotp add UNIQUE_ID register definition

imxrt: enet use ocotp unique_id

imxrt: enet fixes for imxrt117x

imxrt: ethernet pinmux sion enable

imxrt:imxrt_periphclk_configure add memory sync

   Flush the pipeline to prevent bus faults, by insuring a
   peripheral is clocked before being accessed on return from
   this function.

imxrt:Restructure gpioN to padmux mapping

imxrt:Add imxrt1170 daisy

imxrt: correct power modes for imxrt117x fixing hang on WFI

imxrt: imxrt117x TCM MPU config

imxrt: FlexRAM clocking DIV0 setup

imxrt: 117x periphclocks wait for status bit

imxrt: iomucx set pad settings correctly and allow reconfiguration

imxrt: enet align buffers 64-byte for optimal performance

Add DSC barriers for write-through cache support

imxrt: imxrt1170 use FlexCAN FD/ECC features

imxrt:iomuxc_ver2 (117x) SD_B1 and DISP_B1 use PULL feild not PUE/PUS

imxrt:Fix 1170 SNVS addressing

imxrt: enet set mii clock after ifdown so that phy keep working

nxstyle fixes

imxrt: preprocessor and include fixes

Fix configs

imxrt1170-evk clean defconfig
2023-12-07 03:48:19 -08:00

216 lines
5.7 KiB
C

/****************************************************************************
* boards/arm/imxrt/imxrt1170-evk/src/imxrt_gpio.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/clock.h>
#include <nuttx/wdog.h>
#include <nuttx/ioexpander/gpio.h>
#include <arch/board/board.h>
#include "chip.h"
#include <imxrt_gpio.h>
#include "imxrt1170-evk.h"
#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
/****************************************************************************
* Private Types
****************************************************************************/
struct imxrtgpio_dev_s
{
struct gpio_dev_s gpio;
uint8_t id;
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
#if BOARD_NGPIOIN > 0
static int gpin_read(struct gpio_dev_s *dev, bool *value);
#endif
#if BOARD_NGPIOOUT > 0
static int gpout_read(struct gpio_dev_s *dev, bool *value);
static int gpout_write(struct gpio_dev_s *dev, bool value);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#if BOARD_NGPIOIN > 0
static const struct gpio_operations_s gpin_ops =
{
.go_read = gpin_read,
.go_write = NULL,
.go_attach = NULL,
.go_enable = NULL,
};
/* This array maps the GPIO pins used as INPUT */
static const uint32_t g_gpioinputs[BOARD_NGPIOIN] =
{
GPIO_IN1,
};
static struct imxrtgpio_dev_s g_gpin[BOARD_NGPIOIN];
#endif
#if BOARD_NGPIOOUT > 0
static const struct gpio_operations_s gpout_ops =
{
.go_read = gpout_read,
.go_write = gpout_write,
.go_attach = NULL,
.go_enable = NULL,
};
/* This array maps the GPIO pins used as OUTPUT */
static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
{
GPIO_GOUT1,
GPIO_GOUT2,
GPIO_GOUT3,
GPIO_GOUT4,
};
static struct imxrtgpio_dev_s g_gpout[BOARD_NGPIOOUT];
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
#if BOARD_NGPIOIN > 0
static int gpin_read(struct gpio_dev_s *dev, bool *value)
{
struct imxrtgpio_dev_s *imxrtgpio = (struct imxrtgpio_dev_s *)dev;
DEBUGASSERT(imxrtgpio != NULL && value != NULL);
DEBUGASSERT(imxrtgpio->id < BOARD_NGPIOIN);
gpioinfo("Reading...\n");
*value = imxrt_gpio_read(g_gpioinputs[imxrtgpio->id]);
return OK;
}
#endif
#if BOARD_NGPIOOUT > 0
static int gpout_read(struct gpio_dev_s *dev, bool *value)
{
struct imxrtgpio_dev_s *imxrtgpio = (struct imxrtgpio_dev_s *)dev;
DEBUGASSERT(imxrtgpio != NULL && value != NULL);
DEBUGASSERT(imxrtgpio->id < BOARD_NGPIOOUT);
gpioinfo("Reading...\n");
*value = imxrt_gpio_read(g_gpiooutputs[imxrtgpio->id]);
return OK;
}
static int gpout_write(struct gpio_dev_s *dev, bool value)
{
struct imxrtgpio_dev_s *imxrtgpio = (struct imxrtgpio_dev_s *)dev;
DEBUGASSERT(imxrtgpio != NULL);
DEBUGASSERT(imxrtgpio->id < BOARD_NGPIOOUT);
gpioinfo("Writing %d\n", (int)value);
imxrt_gpio_write(g_gpiooutputs[imxrtgpio->id], value);
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: imxrt_gpio_initialize
*
* Description:
* Initialize GPIO drivers for use with /apps/examples/gpio
*
****************************************************************************/
int imxrt_gpio_initialize(void)
{
int pincount = 0;
int i;
#if BOARD_NGPIOIN > 0
for (i = 0; i < BOARD_NGPIOIN; i++)
{
/* Setup and register the GPIO pin */
g_gpin[i].gpio.gp_pintype = GPIO_INPUT_PIN;
g_gpin[i].gpio.gp_ops = &gpin_ops;
g_gpin[i].id = i;
gpio_pin_register(&g_gpin[i].gpio, pincount);
/* Configure the pin that will be used as input */
imxrt_config_gpio(g_gpioinputs[i]);
pincount++;
}
#endif
#if BOARD_NGPIOOUT > 0
for (i = 0; i < BOARD_NGPIOOUT; i++)
{
/* Setup and register the GPIO pin */
g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN;
g_gpout[i].gpio.gp_ops = &gpout_ops;
g_gpout[i].id = i;
gpio_pin_register(&g_gpout[i].gpio, pincount);
/* Configure the pin that will be used as output */
imxrt_gpio_write(g_gpiooutputs[i], 0);
imxrt_config_gpio(g_gpiooutputs[i]);
pincount++;
}
#endif
return 0;
}
#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */