1e4fe73e6b
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4459 42af7a65-404d-4744-a932-0658087f49c3
103 lines
3.3 KiB
Plaintext
103 lines
3.3 KiB
Plaintext
############################################################################
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# arch/arm/src/lpc17xx/Make.defs
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#
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# Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name NuttX nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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# The start-up, "head", file
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HEAD_ASRC = lpc17_vectors.S
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# Common ARM and Cortex-M3 files
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CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
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CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
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up_mdelay.c up_udelay.c up_exit.c up_initialize.c up_memfault.c \
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up_initialstate.c up_interruptcontext.c up_modifyreg8.c \
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up_modifyreg16.c up_modifyreg32.c up_releasepending.c \
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up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
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up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \
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up_hardfault.c up_svcall.c up_checkstack.c
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ifeq ($(CONFIG_NET),y)
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ifneq ($(CONFIG_LPC17_ETHERNET),y)
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CMN_CSRCS += up_etherstub.c
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endif
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endif
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# Required LPC17xx files
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CHIP_ASRCS =
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CHIP_CSRCS = lpc17_allocateheap.c lpc17_clockconfig.c lpc17_clrpend.c \
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lpc17_gpio.c lpc17_i2c.c lpc17_idle.c lpc17_irq.c lpc17_lowputc.c \
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lpc17_serial.c lpc17_spi.c lpc17_ssp.c lpc17_start.c lpc17_timerisr.c
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# Configuration-dependent LPC17xx files
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ifeq ($(CONFIG_GPIO_IRQ),y)
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CHIP_CSRCS += lpc17_gpioint.c
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endif
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ifeq ($(CONFIG_DEBUG_GPIO),y)
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CHIP_CSRCS += lpc17_gpiodbg.c
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endif
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ifeq ($(CONFIG_USBDEV),y)
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CHIP_CSRCS += lpc17_usbdev.c
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endif
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ifeq ($(CONFIG_USBHOST),y)
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CHIP_CSRCS += lpc17_usbhost.c
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endif
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ifeq ($(CONFIG_LPC17_GPDMA),y)
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CHIP_CSRCS += lpc17_gpdma.c
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endif
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ifeq ($(CONFIG_NET),y)
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ifeq ($(CONFIG_LPC17_ETHERNET),y)
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CHIP_CSRCS += lpc17_ethernet.c
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endif
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endif
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ifeq ($(CONFIG_CAN),y)
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CHIP_CSRCS += lpc17_can.c
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endif
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ifeq ($(CONFIG_LPC17_ADC),y)
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CHIP_CSRCS += lpc17_adc.c
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endif
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ifeq ($(CONFIG_LPC17_DAC),y)
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CHIP_CSRCS += lpc17_dac.c
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endif
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